[U-Boot] [RFC 22/35] reset: sunxi: Add initial RESET driver for A10s/A13

[Jagan Teki]

Add initial reset driver for Allwinner A10s/A13.

Implement reset deassert and assert functions for
USB OHCI, EHCI, OTG and PHY bus reset and clock registers.

Signed-off-by: Jagan Teki <jagan at amarulasolutions.com>
---
 drivers/reset/sunxi/Kconfig      |  7 +++
 drivers/reset/sunxi/Makefile     |  1 +
 drivers/reset/sunxi/reset_a10s.c | 93 ++++++++++++++++++++++++++++++++
 3 files changed, 101 insertions(+)
 create mode 100644 drivers/reset/sunxi/reset_a10s.c

diff --git a/drivers/reset/sunxi/Kconfig b/drivers/reset/sunxi/Kconfig
index 523201a4e9..40f4f4d0e6 100644
--- a/drivers/reset/sunxi/Kconfig
+++ b/drivers/reset/sunxi/Kconfig
@@ -16,6 +16,13 @@ config RESET_SUN4I_A10
 	  This enables common reset driver support for platforms based
 	  on Allwinner A10/A20 SoC.
 
+config RESET_SUN5I_A10S
+	bool "Reset driver for Allwinner A10s/A13"
+	default MACH_SUN5I
+	help
+	  This enables common reset driver support for platforms based
+	  on Allwinner A10s/A13 SoC.
+
 config RESET_SUN8I_H3
 	bool "Reset driver for Allwinner H3/H5"
 	default MACH_SUNXI_H3_H5
diff --git a/drivers/reset/sunxi/Makefile b/drivers/reset/sunxi/Makefile
index 6dc0520b6a..38b8907904 100644
--- a/drivers/reset/sunxi/Makefile
+++ b/drivers/reset/sunxi/Makefile
@@ -5,5 +5,6 @@
 #
 
 obj-$(CONFIG_RESET_SUN4I_A10) += reset_a10.o
+obj-$(CONFIG_RESET_SUN5I_A10S) += reset_a10s.o
 obj-$(CONFIG_RESET_SUN8I_H3) += reset_h3.o
 obj-$(CONFIG_RESET_SUN50I_A64) += reset_a64.o
diff --git a/drivers/reset/sunxi/reset_a10s.c b/drivers/reset/sunxi/reset_a10s.c
new file mode 100644
index 0000000000..fb65633836
--- /dev/null
+++ b/drivers/reset/sunxi/reset_a10s.c
@@ -0,0 +1,93 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2018 Amarula Solutions B.V.
+ * Author: Jagan Teki <jagan at amarulasolutions.com>
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <reset-uclass.h>
+#include <asm/io.h>
+#include <dm/lists.h>
+#include <dt-bindings/reset/sun5i-ccu.h>
+
+struct a10s_reset_priv {
+	void *base;
+};
+
+static int a10s_reset_request(struct reset_ctl *reset_ctl)
+{
+	debug("%s(#%ld)\n", __func__, reset_ctl->id);
+
+	/* check dt-bindings/reset/sun5i-a10s-ccu.h for max id */
+	if (reset_ctl->id > 10)
+		return -EINVAL;
+
+	return 0;
+}
+
+static int a10s_reset_free(struct reset_ctl *reset_ctl)
+{
+	debug("%s(#%ld)\n", __func__, reset_ctl->id);
+
+	return 0;
+}
+
+static int a10s_reset_assert(struct reset_ctl *reset_ctl)
+{
+	struct a10s_reset_priv *priv = dev_get_priv(reset_ctl->dev);
+
+	debug("%s(#%ld)\n", __func__, reset_ctl->id);
+
+	switch (reset_ctl->id) {
+	case RST_USB_PHY0:
+	case RST_USB_PHY1:
+		setbits_le32(priv->base + 0x0cc, BIT(reset_ctl->id));
+		return 0;
+	default:
+		debug("%s (RST#%ld) unhandled\n", __func__, reset_ctl->id);
+		return -ENODEV;
+	}
+}
+
+static int a10s_reset_deassert(struct reset_ctl *reset_ctl)
+{
+	struct a10s_reset_priv *priv = dev_get_priv(reset_ctl->dev);
+
+	debug("%s(#%ld)\n", __func__, reset_ctl->id);
+
+	switch (reset_ctl->id) {
+	case RST_USB_PHY0:
+	case RST_USB_PHY1:
+		clrbits_le32(priv->base + 0x0cc, BIT(reset_ctl->id));
+		return 0;
+	default:
+		debug("%s (RST#%ld) unhandled\n", __func__, reset_ctl->id);
+		return -ENODEV;
+	}
+}
+
+struct reset_ops a10s_reset_ops = {
+	.request = a10s_reset_request,
+	.free = a10s_reset_free,
+	.rst_assert = a10s_reset_assert,
+	.rst_deassert = a10s_reset_deassert,
+};
+
+static int a10s_reset_probe(struct udevice *dev)
+{
+	struct a10s_reset_priv *priv = dev_get_priv(dev);
+
+	priv->base = dev_read_addr_ptr(dev);
+
+	return 0;
+}
+
+U_BOOT_DRIVER(reset_sun5i_a10s) = {
+	.name		= "sun5i_a10s_reset",
+	.id		= UCLASS_RESET,
+	.ops		= &a10s_reset_ops,
+	.probe		= a10s_reset_probe,
+	.priv_auto_alloc_size = sizeof(struct a10s_reset_priv),
+};
-- 
2.17.1