[U-Boot] [PATCH 2/8] clk: Add DM CLK driver template for i.MX6QDL

Jagan Teki jagan at amarulasolutions.com
Mon Jul 30 12:56:19 UTC 2018


Add DM CLK driver for iMX6QDL platform.
- basic template for clk_imx6qdl.c
- Kconfig support

Signed-off-by: Jagan Teki <jagan at amarulasolutions.com>
---
 drivers/clk/Kconfig         |  1 +
 drivers/clk/Makefile        |  1 +
 drivers/clk/imx/Kconfig     | 18 +++++++++
 drivers/clk/imx/Makefile    |  7 ++++
 drivers/clk/imx/clk_imx6q.c | 76 +++++++++++++++++++++++++++++++++++++
 drivers/video/ipu_common.c  |  8 ++++
 6 files changed, 111 insertions(+)
 create mode 100644 drivers/clk/imx/Kconfig
 create mode 100644 drivers/clk/imx/Makefile
 create mode 100644 drivers/clk/imx/clk_imx6q.c

diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index a99abed9e9..0a535e49d4 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -85,6 +85,7 @@ config CLK_STM32MP1
 
 source "drivers/clk/at91/Kconfig"
 source "drivers/clk/exynos/Kconfig"
+source "drivers/clk/imx/Kconfig"
 source "drivers/clk/mvebu/Kconfig"
 source "drivers/clk/owl/Kconfig"
 source "drivers/clk/renesas/Kconfig"
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 146283c723..c3288b096f 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -17,6 +17,7 @@ obj-$(CONFIG_CLK_BCM6345) += clk_bcm6345.o
 obj-$(CONFIG_CLK_BOSTON) += clk_boston.o
 obj-$(CONFIG_CLK_EXYNOS) += exynos/
 obj-$(CONFIG_CLK_HSDK) += clk-hsdk-cgu.o
+obj-$(CONFIG_CLK_IMX) += imx/
 obj-$(CONFIG_CLK_OWL) += owl/
 obj-$(CONFIG_CLK_RENESAS) += renesas/
 obj-$(CONFIG_CLK_STM32F) += clk_stm32f.o
diff --git a/drivers/clk/imx/Kconfig b/drivers/clk/imx/Kconfig
new file mode 100644
index 0000000000..f8de5554c8
--- /dev/null
+++ b/drivers/clk/imx/Kconfig
@@ -0,0 +1,18 @@
+config CLK_IMX
+	bool "Clock support for i.MX SoCs"
+	depends on ARCH_MX6
+	select CLK
+	help
+	  This enables support for common clock driver API on i.MX
+	  SoCs.
+
+if CLK_IMX
+
+config CLK_IMX6Q
+	bool "Clock driver for i.MX6QDL"
+	default MX6QDL
+	help
+	  This enables common clock driver support for platforms based
+	  on i.MX6 QDL SoC.
+
+endif # CLK_IMX
diff --git a/drivers/clk/imx/Makefile b/drivers/clk/imx/Makefile
new file mode 100644
index 0000000000..8ae3a50eba
--- /dev/null
+++ b/drivers/clk/imx/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (c) 2018 Arm Ltd.
+#
+# SPDX-License-Identifier:      GPL-2.0+
+#
+
+obj-$(CONFIG_CLK_IMX6Q) += clk_imx6q.o
diff --git a/drivers/clk/imx/clk_imx6q.c b/drivers/clk/imx/clk_imx6q.c
new file mode 100644
index 0000000000..3019218411
--- /dev/null
+++ b/drivers/clk/imx/clk_imx6q.c
@@ -0,0 +1,76 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2018 Amarula Solutions B.V.
+ * Author: Jagan Teki <jagan at amarulasolutions.com>
+ */
+
+#include <common.h>
+#include <clk-uclass.h>
+#include <dm.h>
+#include <errno.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <dt-bindings/clock/imx6qdl-clock.h>
+
+struct imx6q_clk_priv {
+	void *base;
+};
+
+static ulong imx6q_clk_get_rate(struct clk *clk)
+{
+	debug("%s(#%ld)\n", __func__, clk->id);
+
+	debug("  unhandled\n");
+	return -EINVAL;
+}
+
+static ulong imx6q_clk_set_rate(struct clk *clk, ulong rate)
+{
+	debug("%s(#%ld, rate: %lu)\n", __func__, clk->id, rate);
+
+	debug("  unhandled\n");
+	return -EINVAL;
+}
+
+static int imx6q_clk_enable(struct clk *clk)
+{
+	debug("%s(#%ld)\n", __func__, clk->id);
+
+	debug("  unhandled\n");
+	return -EINVAL;
+}
+
+static struct clk_ops imx6q_clk_ops = {
+	.get_rate = imx6q_clk_get_rate,
+	.set_rate = imx6q_clk_set_rate,
+	.enable = imx6q_clk_enable,
+};
+
+static int imx6q_clk_probe(struct udevice *dev)
+{
+	return 0;
+}
+
+static int imx6q_clk_ofdata_to_platdata(struct udevice *dev)
+{
+	struct imx6q_clk_priv *priv = dev_get_priv(dev);
+
+	priv->base = dev_read_addr_ptr(dev);
+
+	return 0;
+}
+
+static const struct udevice_id imx6q_clk_ids[] = {
+	{ .compatible = "fsl,imx6q-ccm" },
+	{ }
+};
+
+U_BOOT_DRIVER(fsl_imx6q_ccm) = {
+	.name		= "fsl_imx6q_ccm",
+	.id		= UCLASS_CLK,
+	.of_match	= imx6q_clk_ids,
+	.priv_auto_alloc_size	= sizeof(struct imx6q_clk_priv),
+	.ofdata_to_platdata	= imx6q_clk_ofdata_to_platdata,
+	.ops		= &imx6q_clk_ops,
+	.probe		= imx6q_clk_probe,
+};
diff --git a/drivers/video/ipu_common.c b/drivers/video/ipu_common.c
index cbe1984e4f..9725f76477 100644
--- a/drivers/video/ipu_common.c
+++ b/drivers/video/ipu_common.c
@@ -86,6 +86,7 @@ struct ipu_ch_param {
 #define IPUV3_CLK_MX6Q		264000000
 #define IPUV3_CLK_MX6DL		198000000
 
+#ifndef CONFIG_CLK
 void clk_enable(struct clk *clk)
 {
 	if (clk) {
@@ -104,6 +105,7 @@ void clk_disable(struct clk *clk)
 		}
 	}
 }
+#endif
 
 int clk_get_usecount(struct clk *clk)
 {
@@ -113,6 +115,7 @@ int clk_get_usecount(struct clk *clk)
 	return clk->usecount;
 }
 
+#ifndef CONFIG_CLK
 u32 clk_get_rate(struct clk *clk)
 {
 	if (!clk)
@@ -120,6 +123,7 @@ u32 clk_get_rate(struct clk *clk)
 
 	return clk->rate;
 }
+#endif
 
 struct clk *clk_get_parent(struct clk *clk)
 {
@@ -129,6 +133,7 @@ struct clk *clk_get_parent(struct clk *clk)
 	return clk->parent;
 }
 
+#ifndef CONFIG_CLK
 int clk_set_rate(struct clk *clk, unsigned long rate)
 {
 	if (!clk)
@@ -139,6 +144,7 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
 
 	return clk->rate;
 }
+#endif
 
 long clk_round_rate(struct clk *clk, unsigned long rate)
 {
@@ -148,6 +154,7 @@ long clk_round_rate(struct clk *clk, unsigned long rate)
 	return clk->round_rate(clk, rate);
 }
 
+#ifndef CONFIG_CLK
 int clk_set_parent(struct clk *clk, struct clk *parent)
 {
 	clk->parent = parent;
@@ -155,6 +162,7 @@ int clk_set_parent(struct clk *clk, struct clk *parent)
 		return clk->set_parent(clk, parent);
 	return 0;
 }
+#endif
 
 static int clk_ipu_enable(struct clk *clk)
 {
-- 
2.18.0.321.gffc6fa0e3



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