[U-Boot] [PATCH v10 00/35] phy: sunxi: Add Allwinner sun4i USB PHY

[Jagan Teki]

On Tue, Jun 5, 2018 at 12:32 PM, Vasily Khoruzhick <anarsoul at gmail.com> wrote:
> On Mon, Jun 4, 2018 at 11:31 PM, Vasily Khoruzhick <anarsoul at gmail.com> wrote:
>> On Mon, Jun 4, 2018 at 10:58 PM, Vasily Khoruzhick <anarsoul at gmail.com> wrote:
>>>> And A64-Relic has only ehci0 and ohci0 no ehci1 and ohci1, better to
>>>> debug it from your side, what went wrong.
>>>
>>> Sure, I can do bisect.
>>
>> dd3228170ad7388bdd57ff18b9e463c36508ebe9 is the first bad commit
>> commit dd3228170ad7388bdd57ff18b9e463c36508ebe9
>> Author: Jagan Teki <jagan at amarulasolutions.com>
>> Date:   Mon May 7 13:03:38 2018 +0530
>>
>>     usb: sunxi: Switch to use generic-phy
>>
>>     Allwinner USB PHY handling can be done through driver-model
>>     generic-phy so add the generic-phy ops to relevant places
>>     on host and musb sunxi driver and enable them in respective
>>     SOC's.
>>
>>     Signed-off-by: Jagan Teki <jagan at amarulasolutions.com>
>>     Acked-by: Jun Nie <jun.nie at linaro.org>
>
> Original code in ehci-sunxi.c and ohci-sunxi.c used following as phy_index:
> priv->phy_index = ((uintptr_t)hccr - SUNXI_USB1_BASE) / BASE_DIST
>
> So apparently phy_index for EHCI1 was 0.
>
> This quick hack fixes EHCI1 and OHCI1 for me (I hope gmail won't
> garble formatting):
>
> diff --git a/drivers/usb/host/ehci-sunxi.c b/drivers/usb/host/ehci-sunxi.c
> index 360efc9116..db87d062fa 100644
> --- a/drivers/usb/host/ehci-sunxi.c
> +++ b/drivers/usb/host/ehci-sunxi.c
> @@ -47,6 +47,7 @@ static int ehci_usb_probe(struct udevice *dev)
>                 phys = 0;
>                 goto no_phy;
>         }
> +       printf("%s: phys: %d\n", __func__, phys);
>
>         ret = generic_phy_get_by_name(dev, "usb", &priv->phy);
>         if (ret) {
> @@ -75,8 +76,8 @@ no_phy:
>  #if defined(CONFIG_MACH_SUNXI_H3_H5) || defined(CONFIG_MACH_SUN50I)
>         extra_ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_OHCI0;
>  #endif
> -       priv->ahb_gate_mask <<= phys * AHB_CLK_DIST;
> -       extra_ahb_gate_mask <<= phys * AHB_CLK_DIST;
> +       priv->ahb_gate_mask <<= 0; //phys * AHB_CLK_DIST;
> +       extra_ahb_gate_mask <<= 0; //phys * AHB_CLK_DIST;
>
>         setbits_le32(&priv->ccm->ahb_gate0,
>                      priv->ahb_gate_mask | extra_ahb_gate_mask);
> diff --git a/drivers/usb/host/ohci-sunxi.c b/drivers/usb/host/ohci-sunxi.c
> index ce2b47a5c4..cd7984240e 100644
> --- a/drivers/usb/host/ohci-sunxi.c
> +++ b/drivers/usb/host/ohci-sunxi.c
> @@ -78,9 +78,9 @@ no_phy:
>         extra_ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0;
>  #endif
>         priv->usb_gate_mask = CCM_USB_CTRL_OHCI0_CLK;
> -       priv->ahb_gate_mask <<= phys * AHB_CLK_DIST;
> -       extra_ahb_gate_mask <<= phys * AHB_CLK_DIST;
> -       priv->usb_gate_mask <<= phys;
> +       priv->ahb_gate_mask <<= 0; //phys * AHB_CLK_DIST;
> +       extra_ahb_gate_mask <<= 0; //phys * AHB_CLK_DIST;
> +       priv->usb_gate_mask <<= 0; //phys;
>
>         setbits_le32(&priv->ccm->ahb_gate0,
>                      priv->ahb_gate_mask | extra_ahb_gate_mask);
>
>
> I'm too tired to look into what this code does and why phy_index has
> to be 0 for EHCI1/OHCI1, but I can safely and surely say that
> dd3228170ad7388bdd57ff18b9e463c36508ebe9 caused the issue.
>
> EHCI1/OHCI1 won't work if ECHI0/OHCI0 aren't enabled.

Let me look at it and will come back.