[U-Boot] [PATCH 2/2] usb: sunxi: sun50i: enable OHCI0 clock when OHCI1 is in use
Marek Vasut
marex at denx.de
Wed Jun 6 09:02:40 UTC 2018
On 06/06/2018 05:38 AM, Vasily Khoruzhick wrote:
> On A64 OHCI1 clock source is OHCI0 clock, so we need to enable OHCI0
> clock when OHCI1 is in use.
>
> Fixes commit dd3228170ad7 ("usb: sunxi: Switch to use generic-phy")
>
> Signed-off-by: Vasily Khoruzhick <anarsoul at gmail.com>
> ---
> drivers/usb/host/ohci-sunxi.c | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/usb/host/ohci-sunxi.c b/drivers/usb/host/ohci-sunxi.c
> index ce2b47a5c4..5661557a3d 100644
> --- a/drivers/usb/host/ohci-sunxi.c
> +++ b/drivers/usb/host/ohci-sunxi.c
> @@ -36,6 +36,7 @@ static int ohci_usb_probe(struct udevice *dev)
> struct ohci_sunxi_priv *priv = dev_get_priv(dev);
> struct ohci_regs *regs = (struct ohci_regs *)devfdt_get_addr(dev);
> int extra_ahb_gate_mask = 0;
> + int extra_usb_gate_mask = 0;
> int phys, ret;
>
> priv->ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
> @@ -78,13 +79,17 @@ no_phy:
> extra_ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0;
> #endif
> priv->usb_gate_mask = CCM_USB_CTRL_OHCI0_CLK;
> +#ifdef CONFIG_MACH_SUN50I
> + extra_usb_gate_mask = CCM_USB_CTRL_OHCI0_CLK;
> +#endif
> priv->ahb_gate_mask <<= phys * AHB_CLK_DIST;
> extra_ahb_gate_mask <<= phys * AHB_CLK_DIST;
> priv->usb_gate_mask <<= phys;
>
> setbits_le32(&priv->ccm->ahb_gate0,
> priv->ahb_gate_mask | extra_ahb_gate_mask);
> - setbits_le32(&priv->ccm->usb_clk_cfg, priv->usb_gate_mask);
> + setbits_le32(&priv->ccm->usb_clk_cfg,
> + priv->usb_gate_mask | extra_usb_gate_mask);
Why is the SoC / compatible information not coming from DT instead ? Why
is the driver polluted by more ifdefs ?
> #ifdef CONFIG_SUNXI_GEN_SUN6I
> setbits_le32(&priv->ccm->ahb_reset0_cfg,
> priv->ahb_gate_mask | extra_ahb_gate_mask);
>
--
Best regards,
Marek Vasut
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