[U-Boot] [PATCH v2 4/4] usb: sunxi: sun50i: enable OHCI0 clock when OHCI1 is in use

[Vasily Khoruzhick]

On A64 OHCI1 clock source is OHCI0 clock, so we need to enable OHCI0
clock when OHCI1 is in use.

Fixes commit dd3228170ad7 ("usb: sunxi: Switch to use generic-phy")

Signed-off-by: Vasily Khoruzhick <anarsoul at gmail.com>
---
 drivers/usb/host/ohci-sunxi.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/host/ohci-sunxi.c b/drivers/usb/host/ohci-sunxi.c
index dfdd1e538d..f024df2f9c 100644
--- a/drivers/usb/host/ohci-sunxi.c
+++ b/drivers/usb/host/ohci-sunxi.c
@@ -49,6 +49,7 @@ static int ohci_usb_probe(struct udevice *dev)
 	struct ohci_sunxi_priv *priv = dev_get_priv(dev);
 	struct ohci_regs *regs = (struct ohci_regs *)devfdt_get_addr(dev);
 	int extra_ahb_gate_mask = 0;
+	int extra_usb_gate_mask = 0;
 	int phys, ret;
 
 	priv->type = (enum ohci_sunxi_type)dev_get_driver_data(dev);
@@ -91,13 +92,16 @@ no_phy:
 	if (priv->type == sun8i_h3_ohci)
 		extra_ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0;
 	priv->usb_gate_mask = CCM_USB_CTRL_OHCI0_CLK;
+	if (priv->type == sun50i_a64_ohci)
+		extra_usb_gate_mask = CCM_USB_CTRL_OHCI0_CLK;
 	priv->ahb_gate_mask <<= phys * AHB_CLK_DIST;
 	extra_ahb_gate_mask <<= phys * AHB_CLK_DIST;
 	priv->usb_gate_mask <<= phys;
 
 	setbits_le32(&priv->ccm->ahb_gate0,
 		     priv->ahb_gate_mask | extra_ahb_gate_mask);
-	setbits_le32(&priv->ccm->usb_clk_cfg, priv->usb_gate_mask);
+	setbits_le32(&priv->ccm->usb_clk_cfg,
+		     priv->usb_gate_mask | extra_usb_gate_mask);
 	if (priv->type == sun6i_a31_ohci ||
 	    priv->type == sun8i_a23_ohci ||
 	    priv->type == sun8i_a83t_ohci ||
-- 
2.17.1