[U-Boot] [PATCH 13/13] x86: cougarcanyon2: Add missing chipset interrupt information

Simon Glass sjg at chromium.org
Thu Jun 7 20:34:26 UTC 2018


On 3 June 2018 at 18:04, Bin Meng <bmeng.cn at gmail.com> wrote:
> Add Panther Point chipset interrupt pin/PIRQ information, and
> enable the generation of PIRQ routing table and MP table.
>
> Signed-off-by: Bin Meng <bmeng.cn at gmail.com>
>
> ---
>
>  arch/x86/dts/cougarcanyon2.dts  | 36 ++++++++++++++++++++++++++++++++++++
>  configs/cougarcanyon2_defconfig |  2 ++
>  2 files changed, 38 insertions(+)

Reviewed-by: Simon Glass <sjg at chromium.org>


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