[U-Boot] [PATCH v2 3/3] x86: cougarcanyon2: Add missing chipset interrupt information

[Bin Meng]

On Wed, Jun 13, 2018 at 9:29 AM, Simon Glass <sjg at chromium.org> wrote:
> On 12 June 2018 at 02:26, Bin Meng <bmeng.cn at gmail.com> wrote:
>> Add Panther Point chipset interrupt pin/PIRQ information, and
>> enable the generation of PIRQ routing table and MP table.
>>
>> Signed-off-by: Bin Meng <bmeng.cn at gmail.com>
>>
>> ---
>>
>> Changes in v2:
>> - add the PIRQ register mapping via "intel,pirq-regmap" property
>>
>>  arch/x86/dts/cougarcanyon2.dts  | 46 +++++++++++++++++++++++++++++++++++++++++
>>  configs/cougarcanyon2_defconfig |  2 ++
>>  2 files changed, 48 insertions(+)
>
> Reviewed-by: Simon Glass <sjg at chromium.org>

applied to u-boot-x86, thanks!