[U-Boot] [PATCH 2/4] ARM: Introduce ability to enable invalidate of BTB with ICIALLU on Cortex-A15 for CVE-2017-5715

[Nishanth Menon]

On 15:46-20180613, Tom Rini wrote:
> On Wed, Jun 13, 2018 at 08:32:15AM -0500, Nishanth Menon wrote:
> > On 23:05-20180612, Marek Vasut wrote:
> > > On 06/12/2018 10:24 PM, Nishanth Menon wrote:
> > [..]
> > > > +#ifdef CONFIG_ARM_CORTEX_A15_CVE_2017_5715
> > > > +	mrc	p15, 0, r0, c1, c0, 1	@ read auxilary control register
> > > > +	orr	r0, r0, #1 << 0		@ Enable invalidates of BTB
> > > 
> > > Can we use BIT() macro in the assembler code too ?
> > 
> > Probably, but just following convention in the rest of the file. Do we
> > want to change from existing code?
> 
> Agreed, we should follow the existing style (and I'm not 100% sure I
> like using BIT() in asm files).

OK. Will drop this feedback about BIT() macro if I have to do a v2.

-- 
Regards,
Nishanth Menon