[U-Boot] P4080DS SerDes configuration (and P4080DS memory, mabye?)

[Wolfgang Wegner]

Dear QoriQ experts,

I am trying to set up a P4080DS board.
The manual (P4080DSUG.pdf) lists SerDes configurations with Bank 1 lanes
A-H used as PCIe, and Banks 2 and 3 as SGMII (one of them configured as
XAUI would be OK, too - what is important to me is 3 PCI slots and an
SGMII slot).

U-Boot lists valid serdes configurations matching those given in the
processor reference manual P4080RM.pdf (table 3-16 on page 144) in
arch/powerpc/cpu/mpc85xx/p4080_serdes.c where no such configuration is
found - however, the document "PBL Configuration Tool User Guide"
(QCSPBLUG.pdf) by Freescale/NXP implies some more configurations on page
12.

Does anybody know about those other configurations? As I did not find
any reference in the Errata I am not yet convinced to give up on them...

BTW, is a pair of registered DIMMs KVR1333D3D4R9S/8G (DDR3 8GB) supposed
to work in the board with current U-Boot 2018.07-rc1-00165-ga715415bb5?
The memory seems to be detected vorrectly but then the console hangs at
the first "Testing..." line:
[...]
DRAM:  Initializing....using SPD
Detected RDIMM 9965516-001.B00LF
Detected RDIMM 9965516-001.B00LF
14 GiB left unmapped
Testing 0x00000000 - 0x7fffffff

2x4GB unbuffered DIMMs seem to run smooth.

Best regards,
Wolfgang