[U-Boot] [UBOOT PATCH v3 2/3] spi: xilinx_spi: Modify transfer logic xilinx_spi_xfer() function

[Jagan Teki]

On Thu, Jun 21, 2018 at 2:53 PM, Vipul Kumar <vipul.kumar at xilinx.com> wrote:
> This patch modify xilinx_spi_xfer() function and add rxfifo() and
> txfifo() functions to add the modularity so that these functions
> can be used by other functions within the same file.
>
> This patch also added support to read fifo_size from dts.
>
> Signed-off-by: Vipul Kumar <vipul.kumar at xilinx.com>
> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu at xilinx.com>
> ---
> - Changes in v3:
> - Added fifo_depth read support and removed from 1/3
> ---
>  drivers/spi/xilinx_spi.c | 102 +++++++++++++++++++++++++++++++----------------
>  1 file changed, 67 insertions(+), 35 deletions(-)
>
> diff --git a/drivers/spi/xilinx_spi.c b/drivers/spi/xilinx_spi.c
> index cc5ac51..4026540 100644
> --- a/drivers/spi/xilinx_spi.c
> +++ b/drivers/spi/xilinx_spi.c
> @@ -19,6 +19,7 @@
>  #include <malloc.h>
>  #include <spi.h>
>  #include <asm/io.h>
> +#include <wait_bit.h>
>
>  /*
>   * [0]: http://www.xilinx.com/support/documentation
> @@ -77,6 +78,8 @@
>  #define CONFIG_XILINX_SPI_IDLE_VAL     GENMASK(7, 0)
>  #endif
>
> +#define XILINX_SPISR_TIMEOUT   10000 /* in milliseconds */
> +
>  /* xilinx spi register set */
>  struct xilinx_spi_regs {
>         u32 __space0__[7];
> @@ -101,6 +104,7 @@ struct xilinx_spi_priv {
>         struct xilinx_spi_regs *regs;
>         unsigned int freq;
>         unsigned int mode;
> +       unsigned int fifo_depth;
>  };
>
>  static int xilinx_spi_probe(struct udevice *bus)
> @@ -110,6 +114,9 @@ static int xilinx_spi_probe(struct udevice *bus)
>
>         priv->regs = (struct xilinx_spi_regs *)devfdt_get_addr(bus);
>
> +       priv->fifo_depth = fdtdec_get_int(gd->fdt_blob, dev_of_offset(bus),
> +                                         "fifo-size", 0);
> +
>         writel(SPISSR_RESET_VALUE, &regs->srr);
>
>         return 0;
> @@ -157,6 +164,46 @@ static int xilinx_spi_release_bus(struct udevice *dev)
>         return 0;
>  }
>
> +static u32 xilinx_spi_fill_txfifo(struct udevice *bus, const u8 *txp,
> +                                 u32 txbytes)
> +{
> +       struct xilinx_spi_priv *priv = dev_get_priv(bus);
> +       struct xilinx_spi_regs *regs = priv->regs;
> +       unsigned char d;
> +       u32 i = 0;
> +
> +       while (txbytes && !(readl(&regs->spisr) & SPISR_TX_FULL) &&
> +              i < priv->fifo_depth) {
> +               d = txp ? *txp++ : CONFIG_XILINX_SPI_IDLE_VAL;
> +               debug("spi_xfer: tx:%x ", d);
> +               /* write out and wait for processing (receive data) */
> +               writel(d & SPIDTR_8BIT_MASK, &regs->spidtr);
> +               txbytes--;
> +               i++;
> +       }

need space

> +       return i;
> +}
> +
> +static u32 xilinx_spi_read_rxfifo(struct udevice *bus, u8 *rxp, u32 rxbytes)
> +{
> +       struct xilinx_spi_priv *priv = dev_get_priv(bus);
> +       struct xilinx_spi_regs *regs = priv->regs;
> +       unsigned char d;
> +       unsigned int i = 0;
> +
> +       while (rxbytes && !(readl(&regs->spisr) & SPISR_RX_EMPTY)) {
> +               d = readl(&regs->spidrr) & SPIDRR_8BIT_MASK;
> +               if (rxp)
> +                       *rxp++ = d;
> +               debug("spi_xfer: rx:%x\n", d);
> +               rxbytes--;
> +               i++;
> +       }
> +       debug("Rx_done\n");
> +
> +       return i;
> +}

Reviewed-by: Jagan Teki <jagan at openedev.com>