[U-Boot] [PATCH 1/7] armv8: fsl-layerscape: add configs for missing register blocks addresses

Laurentiu Tudor laurentiu.tudor at nxp.com
Thu Jun 28 09:41:44 UTC 2018


Add config defines with the sata, edma and qdma register block
base addresses. Also white list the newly introduced defines.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor at nxp.com>
---
 arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h | 3 +++
 scripts/config_whitelist.txt                           | 3 +++
 2 files changed, 6 insertions(+)

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
index 5b4767e0fe..301b3fe642 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
@@ -32,9 +32,12 @@
 #define CONFIG_SYS_NS16550_COM2			(CONFIG_SYS_IMMR + 0x011c0600)
 #define CONFIG_SYS_NS16550_COM3			(CONFIG_SYS_IMMR + 0x011d0500)
 #define CONFIG_SYS_NS16550_COM4			(CONFIG_SYS_IMMR + 0x011d0600)
+#define CONFIG_SYS_EDMA_ADDR			(CONFIG_SYS_IMMR + 0x01c00000)
 #define CONFIG_SYS_XHCI_USB1_ADDR		(CONFIG_SYS_IMMR + 0x01f00000)
 #define CONFIG_SYS_XHCI_USB2_ADDR		(CONFIG_SYS_IMMR + 0x02000000)
 #define CONFIG_SYS_XHCI_USB3_ADDR		(CONFIG_SYS_IMMR + 0x02100000)
+#define CONFIG_SYS_FSL_SATA_ADDR		(CONFIG_SYS_IMMR + 0x02200000)
+#define CONFIG_SYS_QDMA_ADDR			(CONFIG_SYS_IMMR + 0x07380000)
 #define CONFIG_SYS_EHCI_USB1_ADDR		(CONFIG_SYS_IMMR + 0x07600000)
 #define CONFIG_SYS_PCIE1_ADDR			(CONFIG_SYS_IMMR + 0x2400000)
 #define CONFIG_SYS_PCIE2_ADDR			(CONFIG_SYS_IMMR + 0x2500000)
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 1a54337594..46abb27e13 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -2557,6 +2557,7 @@ CONFIG_SYS_DSPI_CTAR7
 CONFIG_SYS_DV_NOR_BOOT_CFG
 CONFIG_SYS_EBI_CFGR_VAL
 CONFIG_SYS_EBI_CSA_VAL
+CONFIG_SYS_EDMA_ADDR
 CONFIG_SYS_EEPROM_BASE
 CONFIG_SYS_EEPROM_BUS_NUM
 CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE
@@ -2914,6 +2915,7 @@ CONFIG_SYS_FSL_RAID_ENGINE_OFFSET
 CONFIG_SYS_FSL_RCPM_ADDR
 CONFIG_SYS_FSL_RMU
 CONFIG_SYS_FSL_RST_ADDR
+CONFIG_SYS_FSL_SATA_ADDR
 CONFIG_SYS_FSL_SCFG_ADDR
 CONFIG_SYS_FSL_SCFG_IODSECR1_ADDR
 CONFIG_SYS_FSL_SCFG_IODSECR1_OFFSET
@@ -4064,6 +4066,7 @@ CONFIG_SYS_PTCPAR
 CONFIG_SYS_PTDPAR
 CONFIG_SYS_PTV
 CONFIG_SYS_PUAPAR
+CONFIG_SYS_QDMA_ADDR
 CONFIG_SYS_QE_FMAN_FW_IN_MMC
 CONFIG_SYS_QE_FMAN_FW_IN_NAND
 CONFIG_SYS_QE_FMAN_FW_IN_NOR
-- 
2.17.1



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