[U-Boot] [PATCH 3/3] pci: layerscape: Add the dts fixup for EP and RC

[Xiaowei Bao]

-----Original Message-----
From: York Sun 
Sent: 2018年11月2日 22:53
To: Xiaowei Bao <xiaowei.bao at nxp.com>; M.h. Lian <minghuan.lian at nxp.com>; Z.q. Hou <zhiqiang.hou at nxp.com>; Mingkai Hu <mingkai.hu at nxp.com>; bmeng.cn at gmail.com; yamada.masahiro at socionext.com; u-boot at lists.denx.de
Cc: Jiafei Pan <jiafei.pan at nxp.com>
Subject: Re: [U-Boot] [PATCH 3/3] pci: layerscape: Add the dts fixup for EP and RC

On 10/25/18 7:01 PM, Xiaowei Bao wrote:
> Add the dts fixup when PCI controller work diffferent mode.
> 
> Signed-off-by: Xiaowei Bao <xiaowei.bao at nxp.com>
> ---
>  drivers/pci/pcie_layerscape_fixup.c |   25 +++++++++++++++++++++++--
>  1 files changed, 23 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/pci/pcie_layerscape_fixup.c 
> b/drivers/pci/pcie_layerscape_fixup.c
> index 1a17bd9..089e031 100644
> --- a/drivers/pci/pcie_layerscape_fixup.c
> +++ b/drivers/pci/pcie_layerscape_fixup.c
> @@ -218,7 +218,7 @@ static void fdt_fixup_pcie(void *blob)  }  #endif
>  
> -static void ft_pcie_ls_setup(void *blob, struct ls_pcie *pcie)
> +static void ft_pcie_rc_fix(void *blob, struct ls_pcie *pcie)
>  {
>  	int off;
>  	uint svr;
> @@ -243,12 +243,33 @@ static void ft_pcie_ls_setup(void *blob, struct ls_pcie *pcie)
>  			return;
>  	}
>  
> -	if (pcie->enabled)
> +	if (pcie->enabled && pcie->mode == PCI_HEADER_TYPE_BRIDGE)
> +		fdt_set_node_status(blob, off, FDT_STATUS_OKAY, 0);
> +	else
> +		fdt_set_node_status(blob, off, FDT_STATUS_DISABLED, 0); }
> +
> +static void ft_pcie_ep_fix(void *blob, struct ls_pcie *pcie) {
> +	int off;
> +
> +	off = fdt_node_offset_by_compat_reg(blob, "fsl,ls-pcie-ep",
> +					    pcie->dbi_res.start);
> +	if (off < 0)
> +		return;
> +
> +	if (pcie->enabled && pcie->mode == PCI_HEADER_TYPE_NORMAL)
>  		fdt_set_node_status(blob, off, FDT_STATUS_OKAY, 0);
>  	else
>  		fdt_set_node_status(blob, off, FDT_STATUS_DISABLED, 0);  } 
>  
> +static void ft_pcie_ls_setup(void *blob, struct ls_pcie *pcie) {
> +	ft_pcie_ep_fix(blob, pcie);
> +	ft_pcie_rc_fix(blob, pcie);
> +}

Wouldn't it be faster to check the result of first call before entering the second function? One cannot be both EP and RC, right?

York
[Xiaowei Bao] Hi York, we add the different note in DTS for RC mode and EP mode of one controller, and the compatible also difference, and the status is disabled in default, so we check the it separately.