[U-Boot] [PATCH v2] fsl-lsch3: soc: Enable AHB read support for Flexspi controller

[York Sun]

On 11/2/18 8:59 AM, York Sun wrote:
> On 9/26/18 4:10 AM, Ashish Kumar wrote:
>> Enable AHB support for Flexspi controller interface meaning
>> memory can be accessed via md command using absolute addresses
>>
>> Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur at nxp.com>
>> Signed-off-by: Rajat Srivastava <rajat.srivastava at nxp.com>
>> Signed-off-by: Ashish Kumar <Ashish.Kumar at nxp.com>
>> ---
>> v2:
>>  1. Rename FSPI to FlexSPI in description and comments
>>  2. s/cmd/command
>>  3. Add macro and comments to improve readablity of code in soc.c
>>  4. Add declaration in soc.h for fspi_ahb_init()
>>
>>  arch/arm/cpu/armv8/fsl-layerscape/Kconfig     | 10 +++++
>>  arch/arm/cpu/armv8/fsl-layerscape/soc.c       | 44 +++++++++++++++++++
>>  .../arm/include/asm/arch-fsl-layerscape/soc.h |  7 +++
>>  3 files changed, 61 insertions(+)
>>
>> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
>> index 5280d33ec8..70f26973e9 100644
>> --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
>> +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
>> @@ -327,6 +327,16 @@ config SYS_FSPI_AHB_INIT
>>  	  performed. Default LUT programmed in AHB mode is Fast Read command
>>  	  with 4-byte addressing enabled.
> 
> SYS_FSPI_AHB_INIT doesn't exist yet.
> 
>>  
>> +config FSPI_AHB_EN_4BYTE
>> +	bool "Enable 4-byte Fast Read command for AHB mode"
>> +	depends on NXP_FSPI
>> +	default n
>> +	help
>> +	  The default setting for FlexSPI AHB bus just supports 3-byte addressing.
>> +	  But some FlexSPI flash sizes are up to 64MBytes.
>> +	  This flag enables fast read command for AHB mode and modifies required
>> +	  LUT to support full FlexSPI flash.
>> +
> 
> NXP_FSPI doesn't exist yet.
> 
> Do you have dependency I missed?
> 

Please fix your patch asap.

York