[U-Boot] [PATCH 19/19] riscv: Allow U-Boot to run on hart 0 only

[Auer, Lukas]

Hi Bin,

On Tue, 2018-11-13 at 00:22 -0800, Bin Meng wrote:
> Allow U-Boot to run on hart 0 only, and suspend other harts.
> 
> With this change, '-smp n' works on QEMU RISC-V board.
> 
> Signed-off-by: Bin Meng <bmeng.cn at gmail.com>
> 
> ---
> 
>  arch/riscv/cpu/start.S | 4 ++++
>  1 file changed, 4 insertions(+)
> 

Reviewed-by: Lukas Auer <lukas.auer at aisec.fraunhofer.de>

I'll try to send my patch series with multi-hart support soon, so I
hope we won't need this patch for long :)

> diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
> index 9858058..fcb0466 100644
> --- a/arch/riscv/cpu/start.S
> +++ b/arch/riscv/cpu/start.S
> @@ -46,6 +46,10 @@ _start:
>  	/* mask all interrupts */
>  	csrw	mie, zero
>  
> +	csrr t0, mhartid
> +	beqz t0, call_board_init_f
> +1:	j 1b
> +

To suspend the other harts, you can also add a WFI instruction before
the jump instruction.

Thanks,
Lukas

>  /*
>   * Set stackpointer in internal/ex RAM to call board_init_f
>   */