[U-Boot] [PATCH 86/93] arm: Remove brppt1_mmc board
Simon Glass
sjg at chromium.org
Mon Nov 19 15:54:06 UTC 2018
This board has not been converted to CONFIG_DM_BLK by the deadline.
Remove it.
Signed-off-by: Simon Glass <sjg at chromium.org>
---
arch/arm/mach-omap2/Kconfig | 1 -
board/BuR/brppt1/Kconfig | 15 --
board/BuR/brppt1/MAINTAINERS | 8 --
board/BuR/brppt1/Makefile | 12 --
board/BuR/brppt1/board.c | 190 -------------------------
board/BuR/brppt1/config.mk | 36 -----
board/BuR/brppt1/mux.c | 253 ----------------------------------
configs/brppt1_mmc_defconfig | 95 -------------
configs/brppt1_nand_defconfig | 99 -------------
configs/brppt1_spi_defconfig | 109 ---------------
include/configs/brppt1.h | 214 ----------------------------
11 files changed, 1032 deletions(-)
delete mode 100644 board/BuR/brppt1/Kconfig
delete mode 100644 board/BuR/brppt1/MAINTAINERS
delete mode 100644 board/BuR/brppt1/Makefile
delete mode 100644 board/BuR/brppt1/board.c
delete mode 100644 board/BuR/brppt1/config.mk
delete mode 100644 board/BuR/brppt1/mux.c
delete mode 100644 configs/brppt1_mmc_defconfig
delete mode 100644 configs/brppt1_nand_defconfig
delete mode 100644 configs/brppt1_spi_defconfig
delete mode 100644 include/configs/brppt1.h
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 5caf4bae6f8..7ccbe2db227 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -176,7 +176,6 @@ source "arch/arm/mach-omap2/omap5/Kconfig"
source "arch/arm/mach-omap2/am33xx/Kconfig"
source "board/BuR/brxre1/Kconfig"
-source "board/BuR/brppt1/Kconfig"
source "board/siemens/draco/Kconfig"
source "board/siemens/pxm2/Kconfig"
source "board/siemens/rut/Kconfig"
diff --git a/board/BuR/brppt1/Kconfig b/board/BuR/brppt1/Kconfig
deleted file mode 100644
index e006c80e6ed..00000000000
--- a/board/BuR/brppt1/Kconfig
+++ /dev/null
@@ -1,15 +0,0 @@
-if TARGET_BRPPT1
-
-config SYS_BOARD
- default "brppt1"
-
-config SYS_VENDOR
- default "BuR"
-
-config SYS_SOC
- default "am33xx"
-
-config SYS_CONFIG_NAME
- default "brppt1"
-
-endif
diff --git a/board/BuR/brppt1/MAINTAINERS b/board/BuR/brppt1/MAINTAINERS
deleted file mode 100644
index 9eddab42089..00000000000
--- a/board/BuR/brppt1/MAINTAINERS
+++ /dev/null
@@ -1,8 +0,0 @@
-BRPPT1 BOARD
-M: Hannes Schmelzer <hannes.schmelzer at br-automation.com>
-S: Maintained
-F: board/BuR/brppt1/
-F: include/configs/brppt1.h
-F: configs/brppt1_mmc_defconfig
-F: configs/brppt1_nand_defconfig
-F: configs/brppt1_spi_defconfig
diff --git a/board/BuR/brppt1/Makefile b/board/BuR/brppt1/Makefile
deleted file mode 100644
index 3dec0e6522a..00000000000
--- a/board/BuR/brppt1/Makefile
+++ /dev/null
@@ -1,12 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# Makefile
-#
-# Copyright (C) 2013 Hannes Schmelzer <oe5hpm at oevsv.at>
-# Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
-
-ifeq ($(CONFIG_SPL_BUILD),y)
-obj-y := mux.o
-endif
-obj-y += ../common/common.o
-obj-y += board.o
diff --git a/board/BuR/brppt1/board.c b/board/BuR/brppt1/board.c
deleted file mode 100644
index d2e7c722423..00000000000
--- a/board/BuR/brppt1/board.c
+++ /dev/null
@@ -1,190 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * board.c
- *
- * Board functions for B&R BRPPT1
- *
- * Copyright (C) 2013 Hannes Schmelzer <oe5hpm at oevsv.at>
- * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
- *
- */
-
-#include <common.h>
-#include <errno.h>
-#include <spl.h>
-#include <asm/arch/cpu.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/omap.h>
-#include <asm/arch/ddr_defs.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/gpio.h>
-#include <asm/arch/sys_proto.h>
-#include <asm/arch/mem.h>
-#include <asm/io.h>
-#include <asm/emif.h>
-#include <asm/gpio.h>
-#include <i2c.h>
-#include <power/tps65217.h>
-#include "../common/bur_common.h"
-#include <watchdog.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/* --------------------------------------------------------------------------*/
-/* -- defines for GPIO -- */
-#define REPSWITCH (0+20) /* GPIO0_20 */
-
-#if defined(CONFIG_SPL_BUILD)
-/* TODO: check ram-timing ! */
-static const struct ddr_data ddr3_data = {
- .datardsratio0 = MT41K256M16HA125E_RD_DQS,
- .datawdsratio0 = MT41K256M16HA125E_WR_DQS,
- .datafwsratio0 = MT41K256M16HA125E_PHY_FIFO_WE,
- .datawrsratio0 = MT41K256M16HA125E_PHY_WR_DATA,
-};
-
-static const struct cmd_control ddr3_cmd_ctrl_data = {
- .cmd0csratio = MT41K256M16HA125E_RATIO,
- .cmd0iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
-
- .cmd1csratio = MT41K256M16HA125E_RATIO,
- .cmd1iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
-
- .cmd2csratio = MT41K256M16HA125E_RATIO,
- .cmd2iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
-};
-
-static struct emif_regs ddr3_emif_reg_data = {
- .sdram_config = MT41K256M16HA125E_EMIF_SDCFG,
- .ref_ctrl = MT41K256M16HA125E_EMIF_SDREF,
- .sdram_tim1 = MT41K256M16HA125E_EMIF_TIM1,
- .sdram_tim2 = MT41K256M16HA125E_EMIF_TIM2,
- .sdram_tim3 = MT41K256M16HA125E_EMIF_TIM3,
- .zq_config = MT41K256M16HA125E_ZQ_CFG,
- .emif_ddr_phy_ctlr_1 = MT41K256M16HA125E_EMIF_READ_LATENCY,
-};
-
-static const struct ctrl_ioregs ddr3_ioregs = {
- .cm0ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
- .cm1ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
- .cm2ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
- .dt0ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
- .dt1ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
-};
-
-#define OSC (V_OSCK/1000000)
-static const struct dpll_params dpll_ddr3 = { 400, OSC-1, 1, -1, -1, -1, -1};
-
-void am33xx_spl_board_init(void)
-{
- int rc;
-
- struct cm_perpll *const cmper = (struct cm_perpll *)CM_PER;
- /*struct cm_wkuppll *const cmwkup = (struct cm_wkuppll *)CM_WKUP;*/
- struct cm_dpll *const cmdpll = (struct cm_dpll *)CM_DPLL;
-
- /*
- * in TRM they write a reset value of 1 (=CLK_M_OSC) for the
- * CLKSEL_TIMER6_CLK Register, in fact reset value is 0, so we need set
- * the source of timer6 clk to CLK_M_OSC
- */
- writel(0x01, &cmdpll->clktimer6clk);
-
- /* enable additional clocks of modules which are accessed later */
- u32 *const clk_domains[] = {
- &cmper->lcdcclkstctrl,
- 0
- };
-
- u32 *const clk_modules_tsspecific[] = {
- &cmper->lcdclkctrl,
- &cmper->timer5clkctrl,
- &cmper->timer6clkctrl,
- 0
- };
- do_enable_clocks(clk_domains, clk_modules_tsspecific, 1);
-
- /* setup I2C */
- enable_i2c_pin_mux();
- i2c_set_bus_num(0);
- i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
- pmicsetup(0);
-
- /* peripheral reset */
- rc = gpio_request(64 + 29, "GPMC_WAIT1");
- if (rc != 0)
- printf("cannot request GPMC_WAIT1 GPIO!\n");
- rc = gpio_direction_output(64 + 29, 1);
- if (rc != 0)
- printf("cannot set GPMC_WAIT1 GPIO!\n");
-
- rc = gpio_request(64 + 28, "GPMC_WAIT0");
- if (rc != 0)
- printf("cannot request GPMC_WAIT0 GPIO!\n");
- rc = gpio_direction_output(64 + 28, 1);
- if (rc != 0)
- printf("cannot set GPMC_WAIT0 GPIO!\n");
-
-}
-
-const struct dpll_params *get_dpll_ddr_params(void)
-{
- return &dpll_ddr3;
-}
-
-void sdram_init(void)
-{
- config_ddr(400, &ddr3_ioregs,
- &ddr3_data,
- &ddr3_cmd_ctrl_data,
- &ddr3_emif_reg_data, 0);
-}
-#endif /* CONFIG_SPL_BUILD */
-
-/* Basic board specific setup. Pinmux has been handled already. */
-int board_init(void)
-{
-#if defined(CONFIG_HW_WATCHDOG)
- hw_watchdog_init();
-#endif
- gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
-#ifdef CONFIG_NAND
- gpmc_init();
-#endif
- return 0;
-}
-
-#ifdef CONFIG_BOARD_LATE_INIT
-static char *bootmodeascii[16] = {
- "BOOT", "reserved", "reserved", "reserved",
- "RUN", "reserved", "reserved", "reserved",
- "reserved", "reserved", "reserved", "reserved",
- "PME", "reserved", "reserved", "DIAG",
-};
-
-int board_late_init(void)
-{
- unsigned char bmode = 0;
- ulong bootcount = 0;
- int rc;
-
- bootcount = bootcount_load() & 0xF;
-
- rc = gpio_request(REPSWITCH, "REPSWITCH");
-
- if (rc != 0 || gpio_get_value(REPSWITCH) == 0 || bootcount == 12)
- bmode = 12;
- else if (bootcount > 0)
- bmode = 0;
- else
- bmode = 4;
-
- printf("Mode: %s\n", bootmodeascii[bmode & 0x0F]);
- env_set_ulong("b_mode", bmode);
-
- /* get sure that bootcmd isn't affected by any bootcount value */
- env_set_ulong("bootlimit", 0);
-
- return 0;
-}
-#endif /* CONFIG_BOARD_LATE_INIT */
diff --git a/board/BuR/brppt1/config.mk b/board/BuR/brppt1/config.mk
deleted file mode 100644
index b11b544c37c..00000000000
--- a/board/BuR/brppt1/config.mk
+++ /dev/null
@@ -1,36 +0,0 @@
-#
-# Copyright (C) 2018 Hannes Schmelzer <oe5hpm at oevsv.at> -
-# B&R Industrial Automation GmbH - http://www.br-automation.com
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-hw-platform-y :=$(shell echo $(CONFIG_DEFAULT_DEVICE_TREE) | sed -e 's/am335x-//')
-
-payload_off :=$(shell printf "%d" $(CONFIG_SYS_SPI_U_BOOT_OFFS))
-
-quiet_cmd_prodbin = PRODBIN $@ $(payload_off)
-cmd_prodbin = \
- dd if=/dev/zero ibs=1M count=2 2>/dev/null | tr "\000" "\377" >$@ && \
- dd conv=notrunc bs=1 if=MLO.byteswap of=$@ seek=0 2>/dev/null && \
- dd bs=1 if=u-boot-dtb.img of=$@ seek=$(payload_off) 2>/dev/null
-
-quiet_cmd_prodzip = SAPZIP $@
-cmd_prodzip = \
- test -d misc && rm -r misc; \
- mkdir misc && \
- cp MLO.byteswap misc/ && \
- cp spl/u-boot-spl.bin misc/ && \
- cp u-boot-dtb.img misc/ && \
- zip -9 -r $@ misc/* >/dev/null $<
-
-ifeq ($(hw-platform-y),brppt1-spi)
-ALL-y += $(hw-platform-y)_prog.bin
-ALL-y += $(hw-platform-y)_prod.zip
-endif
-
-$(hw-platform-y)_prog.bin: u-boot-dtb.img spl/u-boot-spl.bin
- $(call if_changed,prodbin)
-
-$(hw-platform-y)_prod.zip: $(hw-platform-y)_prog.bin
- $(call if_changed,prodzip)
diff --git a/board/BuR/brppt1/mux.c b/board/BuR/brppt1/mux.c
deleted file mode 100644
index 87eee709fd4..00000000000
--- a/board/BuR/brppt1/mux.c
+++ /dev/null
@@ -1,253 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * mux.c
- *
- * Pinmux Setting for B&R BRPPT1 Board(s)
- *
- * Copyright (C) 2013 Hannes Schmelzer <oe5hpm at oevsv.at>
- * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
- */
-
-#include <common.h>
-#include <asm/arch/sys_proto.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/mux.h>
-#include <asm/io.h>
-#include <i2c.h>
-
-static struct module_pin_mux uart0_pin_mux[] = {
- /* UART0_RTS */
- {OFFSET(uart0_rtsn), (MODE(0) | PULLUDEN)},
- /* UART0_CTS */
- {OFFSET(uart0_ctsn), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},
- /* UART0_RXD */
- {OFFSET(uart0_rxd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},
- /* UART0_TXD */
- {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)},
- {-1},
-};
-static struct module_pin_mux uart1_pin_mux[] = {
- /* UART1_RTS as I2C2-SCL */
- {OFFSET(uart1_rtsn), (MODE(3) | PULLUDEN | PULLUP_EN | RXACTIVE)},
- /* UART1_CTS as I2C2-SDA */
- {OFFSET(uart1_ctsn), (MODE(3) | PULLUDEN | PULLUP_EN | RXACTIVE)},
- /* UART1_RXD */
- {OFFSET(uart1_rxd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},
- /* UART1_TXD */
- {OFFSET(uart1_txd), (MODE(0) | PULLUDEN)},
- {-1},
-};
-#ifdef CONFIG_MMC
-static struct module_pin_mux mmc1_pin_mux[] = {
- {OFFSET(gpmc_ad7), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT7 */
- {OFFSET(gpmc_ad6), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT6 */
- {OFFSET(gpmc_ad5), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT5 */
- {OFFSET(gpmc_ad4), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT4 */
-
- {OFFSET(gpmc_ad3), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT3 */
- {OFFSET(gpmc_ad2), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT2 */
- {OFFSET(gpmc_ad1), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT1 */
- {OFFSET(gpmc_ad0), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT0 */
- {OFFSET(gpmc_csn1), (MODE(2) | RXACTIVE | PULLUP_EN)}, /* MMC1_CLK */
- {OFFSET(gpmc_csn2), (MODE(2) | RXACTIVE | PULLUP_EN)}, /* MMC1_CMD */
- {OFFSET(gpmc_csn0), (MODE(7) | RXACTIVE | PULLUP_EN)}, /* MMC1_WP */
- {OFFSET(gpmc_advn_ale), (MODE(7) | RXACTIVE | PULLUP_EN)},/* MMC1_CD */
- {-1},
-};
-#endif
-static struct module_pin_mux i2c0_pin_mux[] = {
- /* I2C_DATA */
- {OFFSET(i2c0_sda), (MODE(0) | RXACTIVE | PULLUDEN | SLEWCTRL)},
- /* I2C_SCLK */
- {OFFSET(i2c0_scl), (MODE(0) | RXACTIVE | PULLUDEN | SLEWCTRL)},
- {-1},
-};
-
-static struct module_pin_mux spi0_pin_mux[] = {
- /* SPI0_SCLK */
- {OFFSET(spi0_sclk), (MODE(0) | RXACTIVE | PULLUDEN | PULLUP_EN)},
- /* SPI0_D0 */
- {OFFSET(spi0_d0), (MODE(0) | RXACTIVE | PULLUDEN | PULLUP_EN)},
- /* SPI0_D1 */
- {OFFSET(spi0_d1), (MODE(0) | RXACTIVE | PULLUDEN | PULLUP_EN)},
- /* SPI0_CS0 */
- {OFFSET(spi0_cs0), (MODE(0) | RXACTIVE | PULLUDEN | PULLUP_EN)},
- {-1},
-};
-
-static struct module_pin_mux mii1_pin_mux[] = {
- {OFFSET(mii1_crs), MODE(0) | RXACTIVE}, /* MII1_CRS */
- {OFFSET(mii1_col), MODE(0) | RXACTIVE}, /* MII1_COL */
- {OFFSET(mii1_rxerr), MODE(0) | RXACTIVE}, /* MII1_RXERR */
- {OFFSET(mii1_txen), MODE(0)}, /* MII1_TXEN */
- {OFFSET(mii1_rxdv), MODE(0) | RXACTIVE}, /* MII1_RXDV */
- {OFFSET(mii1_txd3), MODE(0)}, /* MII1_TXD3 */
- {OFFSET(mii1_txd2), MODE(0)}, /* MII1_TXD2 */
- {OFFSET(mii1_txd1), MODE(0)}, /* MII1_TXD1 */
- {OFFSET(mii1_txd0), MODE(0)}, /* MII1_TXD0 */
- {OFFSET(mii1_txclk), MODE(0) | RXACTIVE}, /* MII1_TXCLK */
- {OFFSET(mii1_rxclk), MODE(0) | RXACTIVE}, /* MII1_RXCLK */
- {OFFSET(mii1_rxd3), MODE(0) | RXACTIVE}, /* MII1_RXD3 */
- {OFFSET(mii1_rxd2), MODE(0) | RXACTIVE}, /* MII1_RXD2 */
- {OFFSET(mii1_rxd1), MODE(0) | RXACTIVE}, /* MII1_RXD1 */
- {OFFSET(mii1_rxd0), MODE(0) | RXACTIVE}, /* MII1_RXD0 */
- {OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN},/* MDIO_DATA */
- {OFFSET(mdio_clk), MODE(0) | PULLUP_EN}, /* MDIO_CLK */
- {-1},
-};
-
-static struct module_pin_mux mii2_pin_mux[] = {
- {OFFSET(gpmc_a0), MODE(1)}, /* MII2_TXEN */
- {OFFSET(gpmc_a1), MODE(1) | RXACTIVE}, /* MII2_RXDV */
- {OFFSET(gpmc_a2), MODE(1)}, /* MII2_TXD3 */
- {OFFSET(gpmc_a3), MODE(1)}, /* MII2_TXD2 */
- {OFFSET(gpmc_a4), MODE(1)}, /* MII2_TXD1 */
- {OFFSET(gpmc_a5), MODE(1)}, /* MII2_TXD0 */
- {OFFSET(gpmc_a6), MODE(1) | RXACTIVE}, /* MII2_TXCLK */
- {OFFSET(gpmc_a7), MODE(1) | RXACTIVE}, /* MII2_RXCLK */
- {OFFSET(gpmc_a8), MODE(1) | RXACTIVE}, /* MII2_RXD3 */
- {OFFSET(gpmc_a9), MODE(1) | RXACTIVE}, /* MII2_RXD2 */
- {OFFSET(gpmc_a10), MODE(1) | RXACTIVE}, /* MII2_RXD1 */
- {OFFSET(gpmc_a11), MODE(1) | RXACTIVE}, /* MII2_RXD0 */
- {OFFSET(gpmc_wpn), (MODE(1) | RXACTIVE)},/* MII2_RXERR */
- {OFFSET(gpmc_wait0), (MODE(1) | RXACTIVE | PULLUP_EN)},
- /*
- * MII2_CRS is shared with
- * NAND_WAIT0
- */
- {OFFSET(gpmc_be1n), (MODE(1) | RXACTIVE)},/* MII1_COL */
- {-1},
-};
-#ifdef CONFIG_NAND
-static struct module_pin_mux nand_pin_mux[] = {
- {OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD0 */
- {OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD1 */
- {OFFSET(gpmc_ad2), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD2 */
- {OFFSET(gpmc_ad3), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD3 */
- {OFFSET(gpmc_ad4), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD4 */
- {OFFSET(gpmc_ad5), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD5 */
- {OFFSET(gpmc_ad6), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD6 */
- {OFFSET(gpmc_ad7), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD7 */
- {OFFSET(gpmc_clk), (MODE(2) | RXACTIVE | PULLUP_EN)}, /* NAND WAIT */
- {OFFSET(gpmc_wpn), (MODE(7) | PULLUP_EN | RXACTIVE)}, /* NAND_WPN */
- {OFFSET(gpmc_csn0), (MODE(0) | PULLUDEN)}, /* NAND_CS0 */
- {OFFSET(gpmc_advn_ale), (MODE(0) | PULLUDEN)}, /* NAND_ADV_ALE */
- {OFFSET(gpmc_oen_ren), (MODE(0) | PULLUDEN)}, /* NAND_OE */
- {OFFSET(gpmc_wen), (MODE(0) | PULLUDEN)}, /* NAND_WEN */
- {OFFSET(gpmc_be0n_cle), (MODE(0) | PULLUDEN)}, /* NAND_BE_CLE */
- {-1},
-};
-#endif
-static struct module_pin_mux gpIOs[] = {
- /* GPIO0_6 (SPI0_CS1) - 3v3_PWR_nEN (Display Power Supply) */
- {OFFSET(spi0_cs1), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)},
- /* TIMER5 (MMC0_DAT3) - TIMER5 (Buzzer) */
- {OFFSET(mmc0_dat3), (MODE(3) | PULLUDEN | RXACTIVE)},
- /* TIMER6 (MMC0_DAT2) - PWM_BACK_3V3 */
- {OFFSET(mmc0_dat2), (MODE(3) | PULLUDEN | RXACTIVE)},
- /* GPIO2_28 (MMC0_DAT1) - MII_nNAND */
- {OFFSET(mmc0_dat1), (MODE(7) | PULLUDEN | RXACTIVE)},
- /* GPIO2_29 (MMC0_DAT0) - NAND_1n0 */
- {OFFSET(mmc0_dat0), (MODE(7) | PULLUDEN | RXACTIVE)},
- /* GPIO2_30 (MMC0_CLK) - nRESET (PHY) */
- {OFFSET(mmc0_clk), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)},
- /* GPIO3_18 (MCASP0_ACLKR) - CPLD JTAG TDI */
- {OFFSET(mcasp0_aclkr), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)},
- /* GPIO3_19 (MCASP0_FSR) - CPLD JTAG TMS */
- {OFFSET(mcasp0_fsr), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)},
- /* GPIO3_20 (MCASP0_AXR1) - CPLD JTAG TCK */
- {OFFSET(mcasp0_axr1), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)},
- /* GPIO3_21 (MCASP0_AHCLKX) - CPLD JTAG TDO */
- {OFFSET(mcasp0_ahclkx), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)},
- /* GPIO2_0 (GPMC_nCS3) - DCOK */
- {OFFSET(gpmc_csn3), (MODE(7) | PULLUDDIS | RXACTIVE) },
- /* GPIO0_29 (RMII1_REFCLK) - eMMC nRST */
- {OFFSET(rmii1_refclk), (MODE(7) | PULLUDDIS | RXACTIVE) },
- /*
- * GPIO0_7 (PWW0 OUT)
- * DISPLAY_ONOFF (Backlight Enable at LVDS Versions)
- */
- {OFFSET(ecap0_in_pwm0_out), (MODE(7) | PULLUDEN | RXACTIVE)},
- /* GPIO0_19 (DMA_INTR0) - DISPLAY_MODE (CPLD) */
- {OFFSET(xdma_event_intr0), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)},
- /* GPIO0_20 (DMA_INTR1) - REP-Switch */
- {OFFSET(xdma_event_intr1), (MODE(7) | PULLUP_EN | RXACTIVE)},
- /* GPIO3_14 (MCASP0_ACLKX) - frei / PP709 */
- {OFFSET(mcasp0_aclkx), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE) },
- /* GPIO3_15 (MCASP0_FSX) - PMIC_nRESET */
- {OFFSET(mcasp0_fsx), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE) },
- /* GPIO3_16 (MCASP0_AXR0) - ETH1_LEDY */
- {OFFSET(mcasp0_axr0), (MODE(7) | PULLUDDIS) },
- /* GPIO3_17 (MCASP0_AHCLKR) - ETH2_LEDY */
- {OFFSET(mcasp0_ahclkr), (MODE(7) | PULLUDDIS) },
-#ifndef CONFIG_NAND
- /* GPIO2_3 - NAND_OE */
- {OFFSET(gpmc_oen_ren), (MODE(7) | PULLDOWN_EN | RXACTIVE)},
- /* GPIO2_4 - NAND_WEN */
- {OFFSET(gpmc_wen), (MODE(7) | PULLDOWN_EN | RXACTIVE)},
- /* GPIO2_5 - NAND_BE_CLE */
- {OFFSET(gpmc_be0n_cle), (MODE(7) | PULLDOWN_EN | RXACTIVE)},
-#endif
- {-1},
-};
-
-static struct module_pin_mux lcd_pin_mux[] = {
- {OFFSET(lcd_data0), (MODE(0) | PULLUDDIS)}, /* LCD-Data(0) */
- {OFFSET(lcd_data1), (MODE(0) | PULLUDDIS)}, /* LCD-Data(1) */
- {OFFSET(lcd_data2), (MODE(0) | PULLUDDIS)}, /* LCD-Data(2) */
- {OFFSET(lcd_data3), (MODE(0) | PULLUDDIS)}, /* LCD-Data(3) */
- {OFFSET(lcd_data4), (MODE(0) | PULLUDDIS)}, /* LCD-Data(4) */
- {OFFSET(lcd_data5), (MODE(0) | PULLUDDIS)}, /* LCD-Data(5) */
- {OFFSET(lcd_data6), (MODE(0) | PULLUDDIS)}, /* LCD-Data(6) */
- {OFFSET(lcd_data7), (MODE(0) | PULLUDDIS)}, /* LCD-Data(7) */
- {OFFSET(lcd_data8), (MODE(0) | PULLUDDIS)}, /* LCD-Data(8) */
- {OFFSET(lcd_data9), (MODE(0) | PULLUDDIS)}, /* LCD-Data(9) */
- {OFFSET(lcd_data10), (MODE(0) | PULLUDDIS)}, /* LCD-Data(10) */
- {OFFSET(lcd_data11), (MODE(0) | PULLUDDIS)}, /* LCD-Data(11) */
- {OFFSET(lcd_data12), (MODE(0) | PULLUDDIS)}, /* LCD-Data(12) */
- {OFFSET(lcd_data13), (MODE(0) | PULLUDDIS)}, /* LCD-Data(13) */
- {OFFSET(lcd_data14), (MODE(0) | PULLUDDIS)}, /* LCD-Data(14) */
- {OFFSET(lcd_data15), (MODE(0) | PULLUDDIS)}, /* LCD-Data(15) */
-
- {OFFSET(gpmc_ad8), (MODE(1) | PULLUDDIS)}, /* LCD-Data(16) */
- {OFFSET(gpmc_ad9), (MODE(1) | PULLUDDIS)}, /* LCD-Data(17) */
- {OFFSET(gpmc_ad10), (MODE(1) | PULLUDDIS)}, /* LCD-Data(18) */
- {OFFSET(gpmc_ad11), (MODE(1) | PULLUDDIS)}, /* LCD-Data(19) */
- {OFFSET(gpmc_ad12), (MODE(1) | PULLUDDIS)}, /* LCD-Data(20) */
- {OFFSET(gpmc_ad13), (MODE(1) | PULLUDDIS)}, /* LCD-Data(21) */
- {OFFSET(gpmc_ad14), (MODE(1) | PULLUDDIS)}, /* LCD-Data(22) */
- {OFFSET(gpmc_ad15), (MODE(1) | PULLUDDIS)}, /* LCD-Data(23) */
-
- {OFFSET(lcd_vsync), (MODE(0) | PULLUDDIS)}, /* LCD-VSync */
- {OFFSET(lcd_hsync), (MODE(0) | PULLUDDIS)}, /* LCD-HSync */
- {OFFSET(lcd_ac_bias_en), (MODE(0) | PULLUDDIS)},/* LCD-DE */
- {OFFSET(lcd_pclk), (MODE(0) | PULLUDDIS)}, /* LCD-CLK */
-
- {-1},
-};
-
-void enable_uart0_pin_mux(void)
-{
- configure_module_pin_mux(uart0_pin_mux);
-}
-
-void enable_i2c_pin_mux(void)
-{
- configure_module_pin_mux(i2c0_pin_mux);
-}
-
-void enable_board_pin_mux(void)
-{
- configure_module_pin_mux(i2c0_pin_mux);
- configure_module_pin_mux(mii1_pin_mux);
- configure_module_pin_mux(mii2_pin_mux);
-#ifdef CONFIG_NAND
- configure_module_pin_mux(nand_pin_mux);
-#elif defined(CONFIG_MMC)
- configure_module_pin_mux(mmc1_pin_mux);
-#endif
- configure_module_pin_mux(spi0_pin_mux);
- configure_module_pin_mux(lcd_pin_mux);
- configure_module_pin_mux(uart1_pin_mux);
- configure_module_pin_mux(gpIOs);
-}
diff --git a/configs/brppt1_mmc_defconfig b/configs/brppt1_mmc_defconfig
deleted file mode 100644
index 3296a74a0ae..00000000000
--- a/configs/brppt1_mmc_defconfig
+++ /dev/null
@@ -1,95 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_OMAP2PLUS=y
-CONFIG_SPL_GPIO_SUPPORT=y
-CONFIG_SPL_LIBCOMMON_SUPPORT=y
-CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SYS_MALLOC_F_LEN=0x4000
-CONFIG_AM33XX=y
-CONFIG_TARGET_BRPPT1=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL=y
-CONFIG_NR_DRAM_BANKS=1
-CONFIG_TPL_SYS_MALLOC_F_LEN=0x0
-# CONFIG_EXPERT is not set
-# CONFIG_FIT is not set
-CONFIG_OF_BOARD_SETUP=y
-CONFIG_BOOTDELAY=0
-CONFIG_USE_BOOTCOMMAND=y
-CONFIG_BOOTCOMMAND="run b_default"
-CONFIG_SYS_CONSOLE_IS_IN_ENV=y
-CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
-CONFIG_SYS_CONSOLE_INFO_QUIET=y
-CONFIG_VERSION_VARIABLE=y
-# CONFIG_DISPLAY_CPUINFO is not set
-# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_ARCH_MISC_INIT=y
-CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_SEPARATE_BSS=y
-CONFIG_SPL_I2C_SUPPORT=y
-# CONFIG_SPL_NAND_SUPPORT is not set
-CONFIG_SPL_POWER_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
-CONFIG_SPL_YMODEM_SUPPORT=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
-# CONFIG_CMD_IMI is not set
-# CONFIG_CMD_XIMG is not set
-# CONFIG_CMD_EDITENV is not set
-# CONFIG_CMD_CRC32 is not set
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
-CONFIG_CMD_USB=y
-# CONFIG_CMD_ITEST is not set
-CONFIG_CMD_DHCP=y
-# CONFIG_CMD_NFS is not set
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_BOOTCOUNT=y
-CONFIG_CMD_BKOPS_ENABLE=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_TIME=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-# CONFIG_SPL_DOS_PARTITION is not set
-CONFIG_OF_CONTROL=y
-CONFIG_SPL_OF_CONTROL=y
-CONFIG_DEFAULT_DEVICE_TREE="am335x-brppt1-mmc"
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clocks clock-names interrupt-parent interrupt-controller interrupt-cells dma-names dmas "
-CONFIG_ENV_IS_IN_MMC=y
-CONFIG_NET_RANDOM_ETHADDR=y
-CONFIG_DM=y
-CONFIG_SPL_DM=y
-CONFIG_SPL_DM_SEQ_ALIAS=y
-# CONFIG_OF_TRANSLATE is not set
-CONFIG_BOOTCOUNT_LIMIT=y
-CONFIG_DM_GPIO=y
-CONFIG_DM_I2C=y
-CONFIG_DM_I2C_COMPAT=y
-CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
-CONFIG_MISC=y
-CONFIG_DM_MMC=y
-CONFIG_MMC_OMAP_HS=y
-CONFIG_PHY_NATSEMI=y
-CONFIG_DM_ETH=y
-CONFIG_DRIVER_TI_CPSW=y
-# CONFIG_NETDEVICES is not set
-CONFIG_DM_SERIAL=y
-CONFIG_USB=y
-CONFIG_DM_USB=y
-CONFIG_USB_MUSB_HOST=y
-CONFIG_USB_MUSB_GADGET=y
-CONFIG_USB_MUSB_TI=y
-CONFIG_USB_MUSB_DSPS=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_GADGET=y
-CONFIG_FAT_WRITE=y
-CONFIG_LZO=y
-# CONFIG_OF_LIBFDT_OVERLAY is not set
-# CONFIG_EFI_LOADER is not set
diff --git a/configs/brppt1_nand_defconfig b/configs/brppt1_nand_defconfig
deleted file mode 100644
index e03eb37dfe2..00000000000
--- a/configs/brppt1_nand_defconfig
+++ /dev/null
@@ -1,99 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_OMAP2PLUS=y
-CONFIG_SPL_GPIO_SUPPORT=y
-CONFIG_SPL_LIBCOMMON_SUPPORT=y
-CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SYS_MALLOC_F_LEN=0x2000
-CONFIG_AM33XX=y
-CONFIG_TARGET_BRPPT1=y
-CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL=y
-CONFIG_NR_DRAM_BANKS=1
-CONFIG_TPL_SYS_MALLOC_F_LEN=0x0
-# CONFIG_EXPERT is not set
-# CONFIG_FIT is not set
-CONFIG_OF_BOARD_SETUP=y
-CONFIG_BOOTDELAY=0
-CONFIG_USE_BOOTCOMMAND=y
-CONFIG_BOOTCOMMAND="run b_default"
-CONFIG_SYS_CONSOLE_IS_IN_ENV=y
-CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
-CONFIG_SYS_CONSOLE_INFO_QUIET=y
-CONFIG_VERSION_VARIABLE=y
-# CONFIG_DISPLAY_CPUINFO is not set
-# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_ARCH_MISC_INIT=y
-CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_SEPARATE_BSS=y
-# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_POWER_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
-CONFIG_SPL_YMODEM_SUPPORT=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
-# CONFIG_CMD_IMI is not set
-# CONFIG_CMD_XIMG is not set
-# CONFIG_CMD_EDITENV is not set
-# CONFIG_CMD_CRC32 is not set
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_NAND=y
-CONFIG_CMD_PART=y
-CONFIG_CMD_USB=y
-# CONFIG_CMD_ITEST is not set
-CONFIG_CMD_DHCP=y
-# CONFIG_CMD_NFS is not set
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_BOOTCOUNT=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_TIME=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_CMD_MTDPARTS=y
-CONFIG_MTDIDS_DEFAULT="nand0=omap2-nand.0"
-CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:128k(MLO),128k(cfgscr),128k(dtb),128k(u-boot-env),512k(u-boot),4m(kernel),128m(rootfs),-(user)"
-# CONFIG_SPL_DOS_PARTITION is not set
-CONFIG_OF_CONTROL=y
-CONFIG_SPL_OF_CONTROL=y
-CONFIG_DEFAULT_DEVICE_TREE="am335x-brppt1-nand"
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clocks clock-names interrupt-parent interrupt-controller interrupt-cells dma-names dmas "
-CONFIG_ENV_IS_IN_NAND=y
-CONFIG_NET_RANDOM_ETHADDR=y
-CONFIG_DM=y
-CONFIG_SPL_DM=y
-CONFIG_SPL_DM_SEQ_ALIAS=y
-# CONFIG_OF_TRANSLATE is not set
-CONFIG_BLK=y
-CONFIG_BOOTCOUNT_LIMIT=y
-CONFIG_DM_GPIO=y
-CONFIG_DM_I2C=y
-CONFIG_DM_I2C_COMPAT=y
-CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
-CONFIG_MISC=y
-# CONFIG_MMC is not set
-CONFIG_NAND=y
-CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
-CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
-CONFIG_PHY_NATSEMI=y
-CONFIG_DM_ETH=y
-CONFIG_DRIVER_TI_CPSW=y
-# CONFIG_NETDEVICES is not set
-CONFIG_DM_SERIAL=y
-CONFIG_USB=y
-CONFIG_DM_USB=y
-CONFIG_USB_MUSB_HOST=y
-CONFIG_USB_MUSB_GADGET=y
-CONFIG_USB_MUSB_TI=y
-CONFIG_USB_MUSB_DSPS=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_GADGET=y
-CONFIG_FAT_WRITE=y
-CONFIG_LZO=y
-# CONFIG_OF_LIBFDT_OVERLAY is not set
-# CONFIG_EFI_LOADER is not set
diff --git a/configs/brppt1_spi_defconfig b/configs/brppt1_spi_defconfig
deleted file mode 100644
index 2fa5dacd7a0..00000000000
--- a/configs/brppt1_spi_defconfig
+++ /dev/null
@@ -1,109 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_OMAP2PLUS=y
-CONFIG_SPL_GPIO_SUPPORT=y
-CONFIG_SPL_LIBCOMMON_SUPPORT=y
-CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SYS_MALLOC_F_LEN=0x4000
-CONFIG_AM33XX=y
-CONFIG_TARGET_BRPPT1=y
-CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL=y
-CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
-CONFIG_NR_DRAM_BANKS=1
-CONFIG_TPL_SYS_MALLOC_F_LEN=0x0
-# CONFIG_EXPERT is not set
-# CONFIG_FIT is not set
-CONFIG_OF_BOARD_SETUP=y
-CONFIG_SPI_BOOT=y
-CONFIG_BOOTDELAY=0
-CONFIG_USE_BOOTCOMMAND=y
-CONFIG_BOOTCOMMAND="run b_default"
-CONFIG_SYS_CONSOLE_IS_IN_ENV=y
-CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
-CONFIG_SYS_CONSOLE_INFO_QUIET=y
-CONFIG_VERSION_VARIABLE=y
-# CONFIG_DISPLAY_CPUINFO is not set
-# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_ARCH_MISC_INIT=y
-CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_SEPARATE_BSS=y
-# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
-CONFIG_SPL_I2C_SUPPORT=y
-# CONFIG_SPL_NAND_SUPPORT is not set
-CONFIG_SPL_POWER_SUPPORT=y
-CONFIG_SPL_SPI_LOAD=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
-CONFIG_SPL_YMODEM_SUPPORT=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
-# CONFIG_CMD_IMI is not set
-# CONFIG_CMD_XIMG is not set
-# CONFIG_CMD_EDITENV is not set
-# CONFIG_CMD_CRC32 is not set
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_USB=y
-# CONFIG_CMD_ITEST is not set
-CONFIG_CMD_DHCP=y
-# CONFIG_CMD_NFS is not set
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_BOOTCOUNT=y
-CONFIG_CMD_BKOPS_ENABLE=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_TIME=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-# CONFIG_SPL_DOS_PARTITION is not set
-CONFIG_OF_CONTROL=y
-CONFIG_SPL_OF_CONTROL=y
-CONFIG_DEFAULT_DEVICE_TREE="am335x-brppt1-spi"
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clocks clock-names interrupt-parent interrupt-controller interrupt-cells dma-names dmas "
-CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_NET_RANDOM_ETHADDR=y
-CONFIG_DM=y
-CONFIG_SPL_DM=y
-CONFIG_SPL_DM_SEQ_ALIAS=y
-# CONFIG_OF_TRANSLATE is not set
-CONFIG_BOOTCOUNT_LIMIT=y
-CONFIG_DM_GPIO=y
-CONFIG_DM_I2C=y
-CONFIG_DM_I2C_COMPAT=y
-CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
-CONFIG_MISC=y
-CONFIG_DM_MMC=y
-CONFIG_MMC_OMAP_HS=y
-CONFIG_MTD_DEVICE=y
-CONFIG_DM_SPI_FLASH=y
-CONFIG_SPI_FLASH=y
-CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
-CONFIG_PHY_NATSEMI=y
-CONFIG_DM_ETH=y
-CONFIG_DRIVER_TI_CPSW=y
-# CONFIG_NETDEVICES is not set
-CONFIG_DM_SERIAL=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_OMAP3_SPI=y
-CONFIG_USB=y
-CONFIG_DM_USB=y
-CONFIG_USB_MUSB_HOST=y
-CONFIG_USB_MUSB_GADGET=y
-CONFIG_USB_MUSB_TI=y
-CONFIG_USB_MUSB_DSPS=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_GADGET=y
-CONFIG_FAT_WRITE=y
-CONFIG_LZO=y
-# CONFIG_OF_LIBFDT_OVERLAY is not set
-# CONFIG_EFI_LOADER is not set
diff --git a/include/configs/brppt1.h b/include/configs/brppt1.h
deleted file mode 100644
index 5badd2da8b6..00000000000
--- a/include/configs/brppt1.h
+++ /dev/null
@@ -1,214 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * brtpp1.h
- *
- * specific parts for B&R T-Series Motherboard
- *
- * Copyright (C) 2013 Hannes Schmelzer <oe5hpm at oevsv.at> -
- * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
- */
-
-#ifndef __CONFIG_BRPPT1_H__
-#define __CONFIG_BRPPT1_H__
-
-#include <configs/bur_cfg_common.h>
-#include <configs/bur_am335x_common.h>
-/* ------------------------------------------------------------------------- */
-/* memory */
-#define CONFIG_SYS_MALLOC_LEN (5 * 1024 * 1024)
-#define CONFIG_SYS_BOOTM_LEN SZ_32M
-
-/* Clock Defines */
-#define V_OSCK 26000000 /* Clock output from T2 */
-#define V_SCLK (V_OSCK)
-
-#define CONFIG_POWER_TPS65217
-
-/* Support both device trees and ATAGs. */
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-/*#define CONFIG_MACH_TYPE 3589*/
-#define CONFIG_MACH_TYPE 0xFFFFFFFF /* TODO: check with kernel*/
-
-/* MMC/SD IP block */
-#if defined(CONFIG_EMMC_BOOT)
- #define CONFIG_SUPPORT_EMMC_BOOT
-#endif /* CONFIG_EMMC_BOOT */
-
-/*
- * When we have NAND flash we expect to be making use of mtdparts,
- * both for ease of use in U-Boot and for passing information on to
- * the Linux kernel.
- */
-
-#ifdef CONFIG_SPL_OS_BOOT
-#define CONFIG_SYS_SPL_ARGS_ADDR 0x80F80000
-
-/* RAW SD card / eMMC */
-#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x900 /* address 0x120000 */
-#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x80 /* address 0x10000 */
-#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80 /* 64KiB */
-
-/* NAND */
-#ifdef CONFIG_NAND
-#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x140000
-#endif /* CONFIG_NAND */
-#endif /* CONFIG_SPL_OS_BOOT */
-
-#ifdef CONFIG_NAND
-#define CONFIG_SPL_NAND_BASE
-#define CONFIG_SPL_NAND_DRIVERS
-#define CONFIG_SPL_NAND_ECC
-#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
-#endif /* CONFIG_NAND */
-
-/* Always 64 KiB env size */
-#define CONFIG_ENV_SIZE (64 << 10)
-
-#ifdef CONFIG_NAND
-#define NANDTGTS \
-"mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
-"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
-"cfgscr=nand read ${cfgaddr} cfgscr && source ${cfgaddr}\0" \
-"nandargs=setenv bootargs console=${console} ${optargs} ${optargs_rot} " \
- "root=mtd6 rootfstype=jffs2 b_mode=${b_mode}\0" \
-"b_nand=nand read ${loadaddr} kernel; nand read ${dtbaddr} dtb; " \
- "run nandargs; run cfgscr; bootz ${loadaddr} - ${dtbaddr}\0" \
-"b_tgts_std=usb0 nand net\0" \
-"b_tgts_rcy=net usb0 nand\0" \
-"b_tgts_pme=usb0 nand net\0"
-#else
-#define NANDTGTS ""
-#endif /* CONFIG_NAND */
-
-#define MMCSPI_TGTS \
-"t30args#0=setenv bootargs ${optargs_rot} ${optargs} console=${console} " \
- "b_mode=${b_mode} root=/dev/mmcblk0p2 rootfstype=ext4\0" \
-"b_t30lgcy#0=" \
- "load ${loaddev}:2 ${loadaddr} /boot/PPTImage.md5 && " \
- "load ${loaddev}:2 ${loadaddr} /boot/zImage && " \
- "load ${loaddev}:2 ${dtbaddr} /boot/am335x-ppt30.dtb || " \
- "load ${loaddev}:1 ${dtbaddr} am335x-ppt30-legacy.dtb; "\
- "run t30args#0; run cfgscr; bootz ${loadaddr} - ${dtbaddr}\0" \
-"t30args#1=setenv bootargs ${optargs_rot} ${optargs} console=${console} " \
- "b_mode=${b_mode}\0" \
-"b_t30lgcy#1=" \
- "load ${loaddev}:1 ${loadaddr} zImage && " \
- "load ${loaddev}:1 ${dtbaddr} am335x-ppt30.dtb && " \
- "load ${loaddev}:1 ${ramaddr} rootfsPPT30.uboot && " \
- "run t30args#1; run cfgscr; bootz ${loadaddr} ${ramaddr} ${dtbaddr}\0" \
-"b_mmc0=load ${loaddev}:1 ${scraddr} bootscr.img && source ${scraddr}\0" \
-"b_mmc1=load ${loaddev}:1 ${scraddr} /boot/bootscr.img && source ${scraddr}\0" \
-"b_tgts_std=mmc0 mmc1 t30lgcy#0 t30lgcy#1 usb0 net\0" \
-"b_tgts_rcy=t30lgcy#1 usb0 net\0" \
-"b_tgts_pme=net usb0 mmc0 mmc1\0" \
-"loaddev=mmc 1\0"
-
-#ifdef CONFIG_ENV_IS_IN_MMC
-#define MMCTGTS \
-MMCSPI_TGTS \
-"cfgscr=mmc dev 1; mmc read ${cfgaddr} 200 80; source ${cfgaddr}\0"
-#else
-#define MMCTGTS ""
-#endif /* CONFIG_MMC */
-
-#ifdef CONFIG_SPI
-#define SPITGTS \
-MMCSPI_TGTS \
-"cfgscr=sf probe; sf read ${cfgaddr} 0xC0000 10000; source ${cfgaddr}\0"
-#else
-#define SPITGTS ""
-#endif /* CONFIG_SPI */
-
-#define LOAD_OFFSET(x) 0x8##x
-
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_EXTRA_ENV_SETTINGS \
-BUR_COMMON_ENV \
-"verify=no\0" \
-"autoload=0\0" \
-"scraddr=" __stringify(LOAD_OFFSET(0000000)) "\0" \
-"cfgaddr=" __stringify(LOAD_OFFSET(0020000)) "\0" \
-"dtbaddr=" __stringify(LOAD_OFFSET(0040000)) "\0" \
-"loadaddr=" __stringify(LOAD_OFFSET(0100000)) "\0" \
-"ramaddr=" __stringify(LOAD_OFFSET(2000000)) "\0" \
-"console=ttyO0,115200n8\0" \
-"optargs=consoleblank=0 quiet panic=2\0" \
-"b_break=0\0" \
-"b_usb0=usb start && load usb 0 ${scraddr} bootscr.img && source ${scraddr}\0" \
-"b_net=tftp ${scraddr} netscript.img && source ${scraddr}\0" \
-MMCTGTS \
-SPITGTS \
-NANDTGTS \
-"b_deftgts=if test ${b_mode} = 12; then setenv b_tgts ${b_tgts_pme};" \
-" elif test ${b_mode} = 0; then setenv b_tgts ${b_tgts_rcy};" \
-" else setenv b_tgts ${b_tgts_std}; fi\0" \
-"b_default=run b_deftgts; for target in ${b_tgts};"\
-" do echo \"### booting ${target} ###\"; run b_${target};" \
-" if test ${b_break} = 1; then; exit; fi; done\0"
-#endif /* !CONFIG_SPL_BUILD*/
-
-#ifdef CONFIG_NAND
-/*
- * GPMC block. We support 1 device and the physical address to
- * access CS0 at is 0x8000000.
- */
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_SYS_NAND_BASE 0x8000000
-/* don't change OMAP_ELM, ECCSCHEME. ROM code only supports this */
-#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW
-#define CONFIG_SYS_NAND_5_ADDR_CYCLE
-#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
-#define CONFIG_SYS_NAND_PAGE_SIZE 2048
-#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
- CONFIG_SYS_NAND_PAGE_SIZE)
-#define CONFIG_SYS_NAND_OOBSIZE 64
-#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
-#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, \
- 10, 11, 12, 13, 14, 15, 16, 17, \
- 18, 19, 20, 21, 22, 23, 24, 25, \
- 26, 27, 28, 29, 30, 31, 32, 33, \
- 34, 35, 36, 37, 38, 39, 40, 41, \
- 42, 43, 44, 45, 46, 47, 48, 49, \
- 50, 51, 52, 53, 54, 55, 56, 57, }
-
-#define CONFIG_SYS_NAND_ECCSIZE 512
-#define CONFIG_SYS_NAND_ECCBYTES 14
-
-#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
-
-#define CONFIG_NAND_OMAP_GPMC_WSCFG 1
-#endif /* CONFIG_NAND */
-
-/* USB configuration */
-#define CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT
-
-#if defined(CONFIG_SPI)
-/* SPI Flash */
-#define CONFIG_SF_DEFAULT_SPEED 24000000
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000
-/* Environment */
-#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
-#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
-#define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
-#define CONFIG_ENV_OFFSET 0x20000
-#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \
- CONFIG_ENV_SECT_SIZE)
-#elif defined(CONFIG_ENV_IS_IN_MMC)
-#define CONFIG_SYS_MMC_ENV_DEV 1
-#define CONFIG_SYS_MMC_ENV_PART 2
-#define CONFIG_ENV_OFFSET 0x40000 /* TODO: Adresse definieren */
-#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
-#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
-
-#elif defined(CONFIG_ENV_IS_IN_NAND)
-/* No NAND env support in SPL */
-#define CONFIG_ENV_OFFSET 0x60000
-#define CONFIG_SYS_ENV_SECT_SIZE CONFIG_ENV_SIZE
-#else
-#error "no storage for Environment defined!"
-#endif
-
-#endif /* ! __CONFIG_BRPPT1_H__ */
--
2.19.1.1215.g8438c0b245-goog
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