[U-Boot] Uboot send pull request

[uboot at andestech.com]

 Hi Tom,

 Please pull the following patch from u-boot-riscv into your tree.
 Thanks!

The following changes since commit d73d81fd85e4a030ade42c4b2d13466d45090aa3:

  Merge tag 'mips-pull-2018-11-18' of git://git.denx.de/u-boot-mips (2018-11-18 15:47:16 -0500)

are available in the Git repository at:

  git://git.denx.de/u-boot-riscv.git

for you to fetch changes up to f1b8761952aca2cdd91f42dbfd26c656072f2d11:

  riscv: ax25-ae350: Pass dtb address to u-boot with a1 register (2018-11-20 14:37:31 +0800)

----------------------------------------------------------------
Bin Meng (1):
      Drop CONFIG_INIT_CRITICAL

Lukas Auer (26):
      tools: .gitignore: add prelink-riscv
      dts: riscv: update makefile to also clean the RISC-V dts directory
      riscv: rename CPU_RISCV_32/64 to match architecture names ARCH_RV32I/64I
      riscv: select CONFIG_PHYS_64BIT on RV64I systems
      riscv: add Kconfig entries for the C and A ISA extensions
      riscv: set -march and -mabi based on the Kconfig configuration
      riscv: fix use of incorrectly sized variables
      riscv: make use of the barrier functions from Linux
      riscv: do not reimplement generic io functions
      riscv: complete the list of exception codes
      riscv: treat undefined exception codes as reserved
      riscv: hang on unhandled exceptions
      riscv: implement the invalidate_icache_* functions
      riscv: fix inconsistent use of spaces and tabs in start.S
      riscv: align mtvec on a 4-byte boundary
      riscv: remove unused labels in start.S
      riscv: do not blindly modify the mstatus CSR
      riscv: save hart ID and device tree passed by prior boot stage
      riscv: qemu: use device tree passed by prior boot stage
      riscv: qemu: support booting Linux
      riscv: align bootm implementation with that of other architectures
      distro_bootcmd: add VirtIO distro boot command
      riscv: qemu: enable distro boot
      dm: core: add missing prototype for ofnode_read_u64
      riscv: qemu: detect and boot the kernel passed by QEMU
      riscv: qemu: clear kernel-start/-end in device tree as workaround for BBL

Rick Chen (7):
      riscv: enable -fdata-sections
      riscv: dts: Sync to Linux Kernel ae350 dts.
      configs: ax25-ae350: Separate ax25-ae350 for RV32/64I.
      riscv: dts: Add ae350_32.dts for RV32I
      configs: ax25-ae350: Enable DISPLAY_CPUINFO & DISPLAY_BOARDINFO
      riscv: cache: Implement i/dcache [status, enable, disable]
      riscv: ax25-ae350: Pass dtb address to u-boot with a1 register

 arch/nds32/cpu/n1213/start.S                             |  51 --------------
 arch/riscv/Kconfig                                       |  34 ++++++---
 arch/riscv/Makefile                                      |  20 ++++++
 arch/riscv/config.mk                                     |   7 +-
 arch/riscv/cpu/ax25/Kconfig                              |   7 ++
 arch/riscv/cpu/ax25/Makefile                             |   1 +
 arch/riscv/cpu/ax25/cache.c                              |  95 ++++++++++++++++++++++++++
 arch/riscv/cpu/ax25/cpu.c                                |   4 ++
 arch/riscv/cpu/cpu.c                                     |   6 ++
 arch/riscv/cpu/qemu/cpu.c                                |   2 +-
 arch/riscv/cpu/start.S                                   | 344 +++++++++++++++++++++++++++++++++++++++++++++-----------------------------------------------
 arch/riscv/dts/Makefile                                  |   1 -
 arch/riscv/dts/ae350.dts                                 | 107 +++++++++++++++++++++++++----
 arch/riscv/dts/ae350_32.dts                              | 229 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 arch/riscv/dts/ae350_64.dts                              | 229 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 arch/riscv/include/asm/barrier.h                         |  67 ++++++++++++++++++
 arch/riscv/include/asm/cache.h                           |   3 +
 arch/riscv/include/asm/io.h                              |  48 +++----------
 arch/riscv/include/asm/posix_types.h                     |   6 +-
 arch/riscv/include/asm/types.h                           |   4 ++
 arch/riscv/lib/bootm.c                                   |  97 ++++++++++++++++++--------
 arch/riscv/lib/cache.c                                   |  36 ++++++++--
 arch/riscv/lib/interrupts.c                              |  31 +++++++--
 arch/riscv/lib/setjmp.S                                  |   2 +-
 board/AndesTech/ax25-ae350/ax25-ae350.c                  |   3 +-
 board/armltd/integrator/README                           |   4 +-
 board/emulation/qemu-riscv/Kconfig                       |   2 +
 board/emulation/qemu-riscv/qemu-riscv.c                  |  73 +++++++++++++++++---
 configs/{ax25-ae350_defconfig => a25-ae350_32_defconfig} |   5 +-
 configs/ax25-ae350_64_defconfig                          |  39 +++++++++++
 configs/qemu-riscv32_defconfig                           |   5 +-
 configs/qemu-riscv64_defconfig                           |   7 +-
 doc/README.distro                                        |   3 +-
 dts/Makefile                                             |   2 +-
 include/common.h                                         |   5 --
 include/config_distro_bootcmd.h                          |  21 ++++--
 include/configs/qemu-riscv.h                             |  28 ++++++++
 include/dm/ofnode.h                                      |  10 +++
 scripts/config_whitelist.txt                             |   1 -
 tools/.gitignore                                         |   1 +
 40 files changed, 1271 insertions(+), 369 deletions(-)
 create mode 100644 arch/riscv/cpu/ax25/Kconfig
 create mode 100644 arch/riscv/cpu/ax25/cache.c
 create mode 100644 arch/riscv/dts/ae350_32.dts
 create mode 100644 arch/riscv/dts/ae350_64.dts
 create mode 100644 arch/riscv/include/asm/barrier.h
 rename configs/{ax25-ae350_defconfig => a25-ae350_32_defconfig} (89%)
 create mode 100644 configs/ax25-ae350_64_defconfig