[U-Boot] [PATCH V2 14/15] drivers: ddr: introduce DDR driver for i.MX8M

[Troy Kisky]

On 11/20/2018 2:19 AM, Peng Fan wrote:
> +#define DDRC_MSTR_0             0x3d400000
> +#define DDRC_STAT_0             0x3d400004
> +#define DDRC_MSTR1_0            0x3d400008
> +

Are you are planning to use DDRC_xxxx_0 in .cfg files?

With SPL, I doubt the above are necessary.

> +/**********************/
> +#define DDRC_MSTR(X)             (DDRC_IPS_BASE_ADDR(X) + 0x00)
> +#define DDRC_STAT(X)             (DDRC_IPS_BASE_ADDR(X) + 0x04)
> +#define DDRC_MSTR1(X)            (DDRC_IPS_BASE_ADDR(X) + 0x08)

Or, do you ever use the above without X == 0 ?