[U-Boot] [PATCH v3 0/3] RISC-V S-mode support
Anup Patel
anup at brainfault.org
Wed Nov 21 03:41:09 UTC 2018
This patchset allows us runing u-boot in S-mode which is
useful on platforms where M-mode runtime firmware is an
independent firmware and u-boot is used as last stage OS
bootloader.
The patchset based upon git://git.denx.de/u-boot-riscv.git
and is tested on QEMU in both M-mode and S-mode.
For S-mode testing, we have used u-boot.bin as payload of
latest BBL (at commit 6ebd0f2a46255d0c76dad3c05b16c1d154795d26)
applied with following changes:
diff --git a/machine/emulation.c b/machine/emulation.c
index 132e977..def75e1 100644
--- a/machine/emulation.c
+++ b/machine/emulation.c
@@ -162,6 +162,12 @@ static inline int emulate_read_csr(int num, uintptr_t mstatus, uintptr_t* result
switch (num)
{
+ case CSR_MISA:
+ *result = read_csr(misa);
+ return 0;
+ case CSR_MHARTID:
+ *result = read_csr(mhartid);
+ return 0;
case CSR_CYCLE:
if (!((counteren >> (CSR_CYCLE - CSR_CYCLE)) & 1))
return -1;
Changes since v2:
- Dropped 'default n" from RISCV_SMODE kconfig option
- Replaced '-smode_' in defconfig names with '_smode_'
Changes since v1:
- Rebased upon latest git://git.denx.de/u-boot-riscv.git
- Add details in cover letter for running u-boot in S-mode
using BBL
Anup Patel (3):
riscv: Add kconfig option to run u-boot in S-mode
riscv: qemu: Use different SYS_TEXT_BASE for S-mode
riscv: Add S-mode defconfigs for QEMU virt machine
arch/riscv/Kconfig | 5 ++++
arch/riscv/cpu/start.S | 33 ++++++++++++++++++++++++++
board/emulation/qemu-riscv/Kconfig | 3 ++-
board/emulation/qemu-riscv/MAINTAINERS | 2 ++
configs/qemu-riscv32_smode_defconfig | 10 ++++++++
configs/qemu-riscv64_smode_defconfig | 11 +++++++++
6 files changed, 63 insertions(+), 1 deletion(-)
create mode 100644 configs/qemu-riscv32_smode_defconfig
create mode 100644 configs/qemu-riscv64_smode_defconfig
--
2.17.1
More information about the U-Boot
mailing list