[U-Boot] [PATCH] x86: tsc: Add support for APL soc

[Bin Meng]

Hi Andy,

On Sun, Nov 25, 2018 at 10:43 PM Andy Shevchenko
<andy.shevchenko at gmail.com> wrote:
>
> On Sun, Nov 25, 2018 at 4:31 PM Andy Shevchenko
> <andy.shevchenko at gmail.com> wrote:
> > On Sat, Nov 24, 2018 at 5:39 PM Bin Meng <bmeng.cn at gmail.com> wrote:
>
> > > Are you saying that if doing cpu_mhz_from_cpuid() you can't get
> > > correct frequency? Can you investigate why your core crystal clock is
> > > always zero?
> >
> > Yes, this has to be investigated.
> >
> > > Can we do it something like VLV2?
> >
> > Please, don't. I see no evidence in the latest Linux kernel sources
> > that Apollo Lake has such issue as Intel MID family of Atom SoCs.
>
> Sorry, I slipped one code in my consideration, i.e.
>
> unsigned long native_calibrate_tsc(void)
> {
> ...
> if (crystal_khz == 0) {
> switch (boot_cpu_data.x86_model) {
> ...
> case INTEL_FAM6_ATOM_GOLDMONT:
> crystal_khz = 19200; /* 19.2 MHz */
> break;
> }
> ...
> if (boot_cpu_data.x86_model == INTEL_FAM6_ATOM_GOLDMONT)
> setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE);
> ...
> }
>
> So, that's what we need to do in U-boot.
>

Thanks for the investigation. Could you please send a proper patch?

Regards,
Bin