[U-Boot] [PATCH 02/13] pico-imx6ul: Convert to SPL

[Jagan Teki]

On Fri, Aug 31, 2018 at 12:40 AM, Otavio Salvador
<otavio at ossystems.com.br> wrote:
> From: Fabio Estevam <festevam at gmail.com>
>
> There are two versions of imx6ul pico SOMs: one with 256MB and another
> one with 512MB of RAM.
>
> Convert to SPL so that both versions can be supported.
>
> Currently only the 256MB is tested/supported.
>
> Signed-off-by: Fabio Estevam <festevam at gmail.com>
> Signed-off-by: Fabio Berton <fabio.berton at ossystems.com.br>
> Signed-off-by: Otavio Salvador <otavio at ossystems.com.br>
> ---
>
>  arch/arm/mach-imx/mx6/Kconfig         |   1 +
>  board/technexion/pico-imx6ul/Makefile |   2 +-
>  board/technexion/pico-imx6ul/spl.c    | 115 ++++++++++++++++++++++++++
>  configs/pico-imx6ul_defconfig         |  14 +++-
>  include/configs/pico-imx6ul.h         |   1 +
>  5 files changed, 131 insertions(+), 2 deletions(-)
>  create mode 100644 board/technexion/pico-imx6ul/spl.c
>
> diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig
> index a2799c436e..06c25bae36 100644
> --- a/arch/arm/mach-imx/mx6/Kconfig
> +++ b/arch/arm/mach-imx/mx6/Kconfig
> @@ -402,6 +402,7 @@ config TARGET_OT1200
>  config TARGET_PICO_IMX6UL
>         bool "PICO-IMX6UL-EMMC"
>         select MX6UL
> +       select SUPPORT_SPL
>
>  config TARGET_LITEBOARD
>         bool "Grinn liteBoard (i.MX6UL)"
> diff --git a/board/technexion/pico-imx6ul/Makefile b/board/technexion/pico-imx6ul/Makefile
> index 8fdb7875ac..b7493df01c 100644
> --- a/board/technexion/pico-imx6ul/Makefile
> +++ b/board/technexion/pico-imx6ul/Makefile
> @@ -2,4 +2,4 @@
>  # (C) Copyright 2015 Technexion Ltd.
>  # (C) Copyright 2015 Freescale Semiconductor, Inc.
>
> -obj-y  := pico-imx6ul.o
> +obj-y  := pico-imx6ul.o spl.o
> diff --git a/board/technexion/pico-imx6ul/spl.c b/board/technexion/pico-imx6ul/spl.c
> new file mode 100644
> index 0000000000..6989c81946
> --- /dev/null
> +++ b/board/technexion/pico-imx6ul/spl.c
> @@ -0,0 +1,115 @@
> +// SPDX-License-Identifier: GPL-2.0+

space

> +#include <asm/arch/clock.h>
> +#include <asm/arch/iomux.h>
> +#include <asm/arch/imx-regs.h>
> +#include <asm/arch/crm_regs.h>
> +#include <asm/arch/mx6ul_pins.h>
> +#include <asm/arch/mx6-pins.h>
> +#include <asm/arch/sys_proto.h>
> +#include <asm/gpio.h>
> +#include <asm/mach-imx/iomux-v3.h>
> +#include <asm/mach-imx/boot_mode.h>
> +#include <linux/libfdt.h>
> +#include <spl.h>
> +
> +#if defined(CONFIG_SPL_BUILD)
> +#include <asm/arch/mx6-ddr.h>
> +
> +static struct mx6ul_iomux_grp_regs mx6_grp_ioregs = {
> +       .grp_addds = 0x00000030,
> +       .grp_ddrmode_ctl = 0x00020000,
> +       .grp_b0ds = 0x00000030,
> +       .grp_ctlds = 0x00000030,
> +       .grp_b1ds = 0x00000030,
> +       .grp_ddrpke = 0x00000000,
> +       .grp_ddrmode = 0x00020000,
> +       .grp_ddr_type = 0x00080000,
> +};
> +
> +static struct mx6ul_iomux_ddr_regs mx6_ddr_ioregs = {
> +       .dram_dqm0 = 0x00000030,
> +       .dram_dqm1 = 0x00000030,
> +       .dram_ras = 0x00000030,
> +       .dram_cas = 0x00000030,
> +       .dram_odt0 = 0x00000030,
> +       .dram_odt1 = 0x00000030,
> +       .dram_sdba2 = 0x00000000,
> +       .dram_sdclk_0 = 0x00000030,
> +       .dram_sdqs0 = 0x00000030,
> +       .dram_sdqs1 = 0x00000030,
> +       .dram_reset = 0x00000030,
> +};
> +
> +static struct mx6_mmdc_calibration mx6_mmcd_calib = {
> +       .p0_mpwldectrl0 = 0x00000000,
> +       .p0_mpdgctrl0 = 0x01380134,
> +       .p0_mprddlctl = 0x40404244,
> +       .p0_mpwrdlctl = 0x40405050,
> +};
> +
> +static struct mx6_ddr_sysinfo ddr_sysinfo = {
> +       .dsize          = 0,
> +       .cs1_mirror     = 0,
> +       .cs_density     = 32,
> +       .ncs            = 1,
> +       .bi_on          = 1,
> +       .rtt_nom        = 1,
> +       .rtt_wr         = 0,
> +       .ralat          = 5,
> +       .walat          = 0,
> +       .mif3_mode      = 3,
> +       .rst_to_cke     = 0x23,
> +       .sde_to_rst     = 0x10,
> +       .refsel = 1,
> +       .refr = 3,
> +};
> +
> +static struct mx6_ddr3_cfg mem_ddr = {
> +       .mem_speed = 1333,
> +       .density = 2,
> +       .width = 16,
> +       .banks = 8,
> +       .rowaddr = 14,
> +       .coladdr = 10,
> +       .pagesz = 2,
> +       .trcd = 1350,
> +       .trcmin = 4950,
> +       .trasmin = 3600,
> +};
> +
> +static void ccgr_init(void)
> +{
> +       struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
> +
> +       writel(0xFFFFFFFF, &ccm->CCGR0);
> +       writel(0xFFFFFFFF, &ccm->CCGR1);
> +       writel(0xFFFFFFFF, &ccm->CCGR2);
> +       writel(0xFFFFFFFF, &ccm->CCGR3);
> +       writel(0xFFFFFFFF, &ccm->CCGR4);
> +       writel(0xFFFFFFFF, &ccm->CCGR5);
> +       writel(0xFFFFFFFF, &ccm->CCGR6);
> +       writel(0xFFFFFFFF, &ccm->CCGR7);

These can be know values.