[U-Boot] [PATCH] arm: socfpga: make socfpga_socrates_defconfig boot from QSPI

Simon Goldschmidt simon.k.r.goldschmidt at gmail.com
Mon Sep 17 20:39:51 UTC 2018


On 09.08.2018 23:57, Marek Vasut wrote:
> On 08/09/2018 09:17 PM, Simon Goldschmidt wrote:
>> On Mon, Aug 6, 2018 at 3:45 PM Simon Goldschmidt
>> <simon.k.r.goldschmidt at gmail.com> wrote:
>>>
>>>
>>> Marek Vasut <marex at denx.de> schrieb am Mo., 6. Aug. 2018, 15:19:
>>>> On 08/06/2018 03:05 PM, Simon Goldschmidt wrote:
>>>>> This fixes the board's dts to supply SPL with QSPI info.
>>>>>
>>>>> The EBV Socrates board has DIP switches to boot from SD card or
>>>>> QSPI, so let's fix its defconfig to work for both cases.
>>>>>
>>>>> Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt at gmail.com>
>>>>>
>>>>> ---
>>>>>
>>>>>   arch/arm/dts/socfpga_cyclone5_socrates.dts | 2 ++
>>>>>   1 file changed, 2 insertions(+)
>>>>>
>>>>> diff --git a/arch/arm/dts/socfpga_cyclone5_socrates.dts b/arch/arm/dts/socfpga_cyclone5_socrates.dts
>>>>> index 0d452ae300..46d7eabdc8 100644
>>>>> --- a/arch/arm/dts/socfpga_cyclone5_socrates.dts
>>>>> +++ b/arch/arm/dts/socfpga_cyclone5_socrates.dts
>>>>> @@ -63,6 +63,7 @@
>>>>>
>>>>>   &qspi {
>>>>>        status = "okay";
>>>>> +     u-boot,dm-pre-reloc;
>>>>>
>>>>>        flash0: n25q00 at 0 {
>>>>>                #address-cells = <1>;
>>>>> @@ -77,6 +78,7 @@
>>>>>                cdns,tsd2d-ns = <50>;
>>>>>                cdns,tchsh-ns = <4>;
>>>>>                cdns,tslch-ns = <4>;
>>>>> +             u-boot,dm-pre-reloc;
>>>>>        };
>>>>>   };
>>>>>
>>>>>
>>>> But the SoCrates boots from SDMMC :-)
>>>
>>> Yours might :-)
>>>
>>> As written above, the board has an 8 digit dip switch to control both hps and fpga boot sources. And I use this board to verify that mainline U-Boot (without our private board configs, which boot from qspi) works on the architecture.
>> So, will it be ok to merge this patch or do we need a separate dts for
>> running from qspi (much like you did recently for the gen10 clk
>> items)? That might be a bad choice though, as my configuration
>> currently runs for both boot types (when enabling both environment
>> drivers).
> If it works with both out of the box, then that's fine.

Gentle ping?

Is there anything missing for this to be merged? Or should we rather 
merge all current socfpga device trees from linux now that this has 
missed 2018.09?

Simon

>
>> BTW, the DIP switches even allow the SoCrates to boot from fpga, which
>> is what I'm currently working on. In this case, it seems like we need
>> a separate config at least, but the dts can still be the same.
> Presumably because the SPL needs different link address ?
>



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