[U-Boot] [PATCH 1/6 v4] mips: Add basic MediaTek MT7620/88 support

[Daniel Schwierzeck]

On 05.09.2018 15:12, Stefan Roese wrote:
> This patch adds basic support for the MediaTek MT7620/88 SoCs. Parts of
> the code is copied from the MediaTek GitHub repository:
> 
> https://github.com/MediaTek-Labs/linkit-smart-uboot.git
> 
> The mt7628a.dtsi file is imported from Linux v4.17.
> 
> Support for the LinkIt Smart 7688 module and the Gardena Smart Gateway
> both based on the MT7688 will be added in further patches.
> 
> Signed-off-by: Stefan Roese <sr at denx.de>
> Cc: Daniel Schwierzeck <daniel.schwierzeck at gmail.com>
> ---
> v4:
> - Remove dead code from debug version in lowlevel_init
> - Use sX registers now for real
> - Increase cache line size in ddr_calibrate() to 128 as done in the
>   original code
> 
> v3:
> - Added dtsi file with this platforms support as suggested by Daniel
> - Rebased on top of Daniels I-cache startup patches -> removed magic
>   with KSEG0 call of ddr_calibrate. Its now called directly and the
>   bootup is much faster
> - Some improvements to print_cpuinfo(), use ioremap_nocache etc
> - Added .set noreorder to lowlevel_init.S
> - Multiple improvements to lowlevel_init.S as suggested by Daniel
> 
> v2:
> - Sort Kconfig symbols alphabetically
> - Use MIPS_TUNE_24KC
> - Use imply for SPI support
> - Dont' add LinkIt module support yet (is added with the board support)
> - Move SKIP_LOWLEVEL_INIT from Kconfig to config header
> - Use DT to get the base address of the system controller (for
>   display_cpuinfo)
> - Remove _machine_restart - a separate driver is provided in a new patch
> - Remove cachop_op() and cal_invalidate_dcache_range and use the
>   generic invalidate_dcache_range function instead
> 
>  arch/mips/Kconfig                     |  16 ++
>  arch/mips/Makefile                    |   1 +
>  arch/mips/dts/mt7628a.dtsi            | 135 +++++++++++
>  arch/mips/mach-mt7620/Kconfig         | 113 +++++++++
>  arch/mips/mach-mt7620/Makefile        |   8 +
>  arch/mips/mach-mt7620/cpu.c           |  69 ++++++
>  arch/mips/mach-mt7620/ddr_calibrate.c | 308 ++++++++++++++++++++++++
>  arch/mips/mach-mt7620/lowlevel_init.S | 322 ++++++++++++++++++++++++++
>  arch/mips/mach-mt7620/mt76xx.h        |  32 +++
>  9 files changed, 1004 insertions(+)
>  create mode 100644 arch/mips/dts/mt7628a.dtsi
>  create mode 100644 arch/mips/mach-mt7620/Kconfig
>  create mode 100644 arch/mips/mach-mt7620/Makefile
>  create mode 100644 arch/mips/mach-mt7620/cpu.c
>  create mode 100644 arch/mips/mach-mt7620/ddr_calibrate.c
>  create mode 100644 arch/mips/mach-mt7620/lowlevel_init.S
>  create mode 100644 arch/mips/mach-mt7620/mt76xx.h
> 

applied to u-boot-mips, thanks.

Stefan, because CONFIG_NR_DRAM_BANKS was converted to Kconfig in
mainline, I needed to run moveconfig.py on your patch series. I
committed all changes on the defconfig files which removes things like
your SPI driver and SPI-NAND support. I think a "make savedefconfig"
should always produce the same result. You should send follow-up patches
to enable those features after they are merged to mainline.

-- 
- Daniel

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