[U-Boot] [PATCH v2 3/4] aspeed: Update ast2500 SoC DTS file to Linux v4.17-rc6 level
Cédric Le Goater
clg at kaod.org
Tue Sep 25 05:52:55 UTC 2018
On 09/25/2018 02:21 AM, Joel Stanley wrote:
> On Fri, 21 Sep 2018 at 16:09, Cédric Le Goater <clg at kaod.org> wrote:
>>
>> This is a large update of the AST2500 Soc DTS file bringing it to the
>> level of commit 927c2fc2db19 :
>>
>> Author: Joel Stanley <joel at jms.id.au>
>> Date: Sat Jun 2 01:18:53 2018 -0700
>>
>> ARM: dts: aspeed: Fix hwrng register address
>>
>> There are some differences on the compatibility property names. scu,
>> reset and clock drivers are also different.
>
> You made the required changes in this patch? We should document those
> so we know how to sync it next time.
I only changed where the nodes were defined in the u-boot DTS file. As
for the sync, it is necessarily manual :/ See below for the differences.
The clocks are defined in another DTS file in u-boot. May be there is
room for improvements on both sides tough.
Syncing the "compatible" strings would be a good thing.
> If it's possible, we can also add compatible properties to the Linux
> version of the device tree to make syncing easier.
>
>> Signed-off-by: Cédric Le Goater <clg at kaod.org>
>
> Reviewed-by: Joel Stanley <joel at jms.id.au>
Thanks,
C.
--- linux/arch/arm/boot/dts/aspeed-g5.dtsi 2018-06-14 16:30:01.790506371 +0200
+++ u-boot/arch/arm//dts/ast2500.dtsi 2018-09-22 17:35:14.302476829 +0200
@@ -1,5 +1,8 @@
-// SPDX-License-Identifier: GPL-2.0+
-#include <dt-bindings/clock/aspeed-clock.h>
+/*
+ * This device tree is copied from
+ * https://raw.githubusercontent.com/torvalds/linux/34ea5c9d/arch/arm/boot/dts/aspeed-g5.dtsi
+ */
+#include "skeleton.dtsi"
/ {
model = "Aspeed BMC";
@@ -59,7 +62,6 @@
#address-cells = <1>;
#size-cells = <0>;
compatible = "aspeed,ast2500-fmc";
- clocks = <&syscon ASPEED_CLK_AHB>;
status = "disabled";
interrupts = <19>;
flash at 0 {
@@ -85,7 +87,6 @@
#address-cells = <1>;
#size-cells = <0>;
compatible = "aspeed,ast2500-spi";
- clocks = <&syscon ASPEED_CLK_AHB>;
status = "disabled";
flash at 0 {
reg = < 0 >;
@@ -105,7 +106,6 @@
#address-cells = <1>;
#size-cells = <0>;
compatible = "aspeed,ast2500-spi";
- clocks = <&syscon ASPEED_CLK_AHB>;
status = "disabled";
flash at 0 {
reg = < 0 >;
@@ -131,7 +131,6 @@
compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
reg = <0x1e660000 0x180>;
interrupts = <2>;
- clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>;
status = "disabled";
};
@@ -139,7 +138,6 @@
compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
reg = <0x1e680000 0x180>;
interrupts = <3>;
- clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>;
status = "disabled";
};
@@ -147,7 +145,6 @@
compatible = "aspeed,ast2500-ehci", "generic-ehci";
reg = <0x1e6a1000 0x100>;
interrupts = <5>;
- clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
status = "disabled";
};
@@ -155,7 +152,6 @@
compatible = "aspeed,ast2500-ehci", "generic-ehci";
reg = <0x1e6a3000 0x100>;
interrupts = <13>;
- clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>;
status = "disabled";
};
@@ -164,7 +160,6 @@
reg = <0x1e6b0000 0x100>;
interrupts = <14>;
#ports = <2>;
- clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
status = "disabled";
};
@@ -175,10 +170,8 @@
ranges;
syscon: syscon at 1e6e2000 {
- compatible = "aspeed,ast2500-scu", "syscon", "simple-mfd";
+ compatible = "aspeed,g5-scu", "syscon", "simple-mfd";
reg = <0x1e6e2000 0x1a8>;
- #address-cells = <1>;
- #size-cells = <0>;
#clock-cells = <1>;
#reset-cells = <1>;
@@ -189,6 +182,39 @@
};
};
+ clk_clkin: clk_clkin at 1e6e2070 {
+ #clock-cells = <0>;
+ compatible = "aspeed,g5-clkin-clock";
+ reg = <0x1e6e2070 0x04>;
+ };
+
+ clk_hpll: clk_hpll at 1e6e2024 {
+ #clock-cells = <0>;
+ compatible = "aspeed,g5-hpll-clock";
+ reg = <0x1e6e2024 0x4>;
+ clocks = <&clk_clkin>;
+ };
+
+ clk_ahb: clk_ahb at 1e6e2070 {
+ #clock-cells = <0>;
+ compatible = "aspeed,g5-ahb-clock";
+ reg = <0x1e6e2070 0x4>;
+ clocks = <&clk_hpll>;
+ };
+
+ clk_apb: clk_apb at 1e6e2008 {
+ #clock-cells = <0>;
+ compatible = "aspeed,g5-apb-clock";
+ reg = <0x1e6e2008 0x4>;
+ clocks = <&clk_hpll>;
+ };
+
+ clk_uart: clk_uart at 1e6e2008 {
+ #clock-cells = <0>;
+ compatible = "aspeed,uart-clock";
+ reg = <0x1e6e202c 0x4>;
+ };
+
rng: hwrng at 1e6e2078 {
compatible = "timeriomem_rng";
reg = <0x1e6e2078 0x4>;
@@ -205,8 +231,6 @@
adc: adc at 1e6e9000 {
compatible = "aspeed,ast2500-adc";
reg = <0x1e6e9000 0xb0>;
- clocks = <&syscon ASPEED_CLK_APB>;
- resets = <&syscon ASPEED_RESET_ADC>;
#io-channel-cells = <1>;
status = "disabled";
};
@@ -223,7 +247,6 @@
reg = <0x1e780000 0x1000>;
interrupts = <20>;
gpio-ranges = <&pinctrl 0 0 220>;
- clocks = <&syscon ASPEED_CLK_APB>;
interrupt-controller;
};
@@ -231,9 +254,11 @@
/* This timer is a Faraday FTTMR010 derivative */
compatible = "aspeed,ast2400-timer";
reg = <0x1e782000 0x90>;
- interrupts = <16 17 18 35 36 37 38 39>;
- clocks = <&syscon ASPEED_CLK_APB>;
- clock-names = "PCLK";
+ // The moxart_timer driver registers only one
+ // interrupt and assumes it's for timer 1
+ //interrupts = <16 17 18 35 36 37 38 39>;
+ interrupts = <16>;
+ clocks = <&clk_apb>;
};
uart1: serial at 1e783000 {
@@ -241,8 +266,7 @@
reg = <0x1e783000 0x20>;
reg-shift = <2>;
interrupts = <9>;
- clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>;
- resets = <&lpc_reset 4>;
+ clocks = <&clk_uart>;
no-loopback-test;
status = "disabled";
};
@@ -252,27 +276,28 @@
reg = <0x1e784000 0x20>;
reg-shift = <2>;
interrupts = <10>;
- clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>;
+ clocks = <&clk_uart>;
+ current-speed = <38400>;
no-loopback-test;
status = "disabled";
};
wdt1: watchdog at 1e785000 {
- compatible = "aspeed,ast2500-wdt";
- reg = <0x1e785000 0x20>;
- clocks = <&syscon ASPEED_CLK_APB>;
+ compatible = "aspeed,wdt";
+ reg = <0x1e785000 0x1c>;
+ interrupts = <27>;
};
wdt2: watchdog at 1e785020 {
- compatible = "aspeed,ast2500-wdt";
- reg = <0x1e785020 0x20>;
- clocks = <&syscon ASPEED_CLK_APB>;
+ compatible = "aspeed,wdt";
+ reg = <0x1e785020 0x1c>;
+ interrupts = <27>;
+ status = "disabled";
};
wdt3: watchdog at 1e785040 {
- compatible = "aspeed,ast2500-wdt";
- reg = <0x1e785040 0x20>;
- clocks = <&syscon ASPEED_CLK_APB>;
+ compatible = "aspeed,wdt";
+ reg = <0x1e785040 0x1c>;
status = "disabled";
};
@@ -281,8 +306,6 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0x1e786000 0x1000>;
- clocks = <&syscon ASPEED_CLK_APB>;
- resets = <&syscon ASPEED_RESET_PWM>;
status = "disabled";
};
@@ -291,7 +314,6 @@
reg = <0x1e787000 0x40>;
reg-shift = <2>;
interrupts = <8>;
- clocks = <&syscon ASPEED_CLK_APB>;
no-loopback-test;
status = "disabled";
};
@@ -321,7 +343,6 @@
lpc_ctrl: lpc-ctrl at 0 {
compatible = "aspeed,ast2500-lpc-ctrl";
reg = <0x0 0x80>;
- clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
status = "disabled";
};
@@ -357,8 +378,7 @@
reg = <0x1e78d000 0x20>;
reg-shift = <2>;
interrupts = <32>;
- clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>;
- resets = <&lpc_reset 5>;
+ clocks = <&clk_uart>;
no-loopback-test;
status = "disabled";
};
@@ -368,8 +388,7 @@
reg = <0x1e78e000 0x20>;
reg-shift = <2>;
interrupts = <33>;
- clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>;
- resets = <&lpc_reset 6>;
+ clocks = <&clk_uart>;
no-loopback-test;
status = "disabled";
};
@@ -379,8 +398,7 @@
reg = <0x1e78f000 0x20>;
reg-shift = <2>;
interrupts = <34>;
- clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>;
- resets = <&lpc_reset 7>;
+ clocks = <&clk_uart>;
no-loopback-test;
status = "disabled";
};
@@ -411,8 +429,6 @@
reg = <0x40 0x40>;
compatible = "aspeed,ast2500-i2c-bus";
- clocks = <&syscon ASPEED_CLK_APB>;
- resets = <&syscon ASPEED_RESET_I2C>;
bus-frequency = <100000>;
interrupts = <0>;
interrupt-parent = <&i2c_ic>;
@@ -427,8 +443,6 @@
reg = <0x80 0x40>;
compatible = "aspeed,ast2500-i2c-bus";
- clocks = <&syscon ASPEED_CLK_APB>;
- resets = <&syscon ASPEED_RESET_I2C>;
bus-frequency = <100000>;
interrupts = <1>;
interrupt-parent = <&i2c_ic>;
@@ -443,8 +457,6 @@
reg = <0xc0 0x40>;
compatible = "aspeed,ast2500-i2c-bus";
- clocks = <&syscon ASPEED_CLK_APB>;
- resets = <&syscon ASPEED_RESET_I2C>;
bus-frequency = <100000>;
interrupts = <2>;
interrupt-parent = <&i2c_ic>;
@@ -460,8 +472,6 @@
reg = <0x100 0x40>;
compatible = "aspeed,ast2500-i2c-bus";
- clocks = <&syscon ASPEED_CLK_APB>;
- resets = <&syscon ASPEED_RESET_I2C>;
bus-frequency = <100000>;
interrupts = <3>;
interrupt-parent = <&i2c_ic>;
@@ -477,8 +487,6 @@
reg = <0x140 0x40>;
compatible = "aspeed,ast2500-i2c-bus";
- clocks = <&syscon ASPEED_CLK_APB>;
- resets = <&syscon ASPEED_RESET_I2C>;
bus-frequency = <100000>;
interrupts = <4>;
interrupt-parent = <&i2c_ic>;
@@ -494,8 +502,6 @@
reg = <0x180 0x40>;
compatible = "aspeed,ast2500-i2c-bus";
- clocks = <&syscon ASPEED_CLK_APB>;
- resets = <&syscon ASPEED_RESET_I2C>;
bus-frequency = <100000>;
interrupts = <5>;
interrupt-parent = <&i2c_ic>;
@@ -511,8 +517,6 @@
reg = <0x1c0 0x40>;
compatible = "aspeed,ast2500-i2c-bus";
- clocks = <&syscon ASPEED_CLK_APB>;
- resets = <&syscon ASPEED_RESET_I2C>;
bus-frequency = <100000>;
interrupts = <6>;
interrupt-parent = <&i2c_ic>;
@@ -528,8 +532,6 @@
reg = <0x300 0x40>;
compatible = "aspeed,ast2500-i2c-bus";
- clocks = <&syscon ASPEED_CLK_APB>;
- resets = <&syscon ASPEED_RESET_I2C>;
bus-frequency = <100000>;
interrupts = <7>;
interrupt-parent = <&i2c_ic>;
@@ -545,8 +547,6 @@
reg = <0x340 0x40>;
compatible = "aspeed,ast2500-i2c-bus";
- clocks = <&syscon ASPEED_CLK_APB>;
- resets = <&syscon ASPEED_RESET_I2C>;
bus-frequency = <100000>;
interrupts = <8>;
interrupt-parent = <&i2c_ic>;
@@ -562,8 +562,6 @@
reg = <0x380 0x40>;
compatible = "aspeed,ast2500-i2c-bus";
- clocks = <&syscon ASPEED_CLK_APB>;
- resets = <&syscon ASPEED_RESET_I2C>;
bus-frequency = <100000>;
interrupts = <9>;
interrupt-parent = <&i2c_ic>;
@@ -579,8 +577,6 @@
reg = <0x3c0 0x40>;
compatible = "aspeed,ast2500-i2c-bus";
- clocks = <&syscon ASPEED_CLK_APB>;
- resets = <&syscon ASPEED_RESET_I2C>;
bus-frequency = <100000>;
interrupts = <10>;
interrupt-parent = <&i2c_ic>;
@@ -596,8 +592,6 @@
reg = <0x400 0x40>;
compatible = "aspeed,ast2500-i2c-bus";
- clocks = <&syscon ASPEED_CLK_APB>;
- resets = <&syscon ASPEED_RESET_I2C>;
bus-frequency = <100000>;
interrupts = <11>;
interrupt-parent = <&i2c_ic>;
@@ -613,8 +607,6 @@
reg = <0x440 0x40>;
compatible = "aspeed,ast2500-i2c-bus";
- clocks = <&syscon ASPEED_CLK_APB>;
- resets = <&syscon ASPEED_RESET_I2C>;
bus-frequency = <100000>;
interrupts = <12>;
interrupt-parent = <&i2c_ic>;
@@ -630,8 +622,6 @@
reg = <0x480 0x40>;
compatible = "aspeed,ast2500-i2c-bus";
- clocks = <&syscon ASPEED_CLK_APB>;
- resets = <&syscon ASPEED_RESET_I2C>;
bus-frequency = <100000>;
interrupts = <13>;
interrupt-parent = <&i2c_ic>;
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