[U-Boot] [PATCH 17/48] keymile: Simplify kmcoge5ne, kmeter1 configs
Mario Six
mario.six at gdsys.cc
Fri Sep 28 09:52:53 UTC 2018
Simplify the kmcoge5ne and kmeter1 configs to only include the #ifdefs
necessary for each board.
Signed-off-by: Mario Six <mario.six at gdsys.cc>
---
include/configs/kmcoge5ne.h | 29 --------------
include/configs/kmeter1.h | 97 +--------------------------------------------
2 files changed, 1 insertion(+), 125 deletions(-)
diff --git a/include/configs/kmcoge5ne.h b/include/configs/kmcoge5ne.h
index 29d977b901..87efaa4a7c 100644
--- a/include/configs/kmcoge5ne.h
+++ b/include/configs/kmcoge5ne.h
@@ -12,11 +12,6 @@
#define CONFIG_SYS_KMBEC_FPGA_BASE 0xE8000000
#define CONFIG_SYS_KMBEC_FPGA_SIZE 64
-#if defined CONFIG_TARGET_KMETER1
-#define CONFIG_HOSTNAME "kmeter1"
-#define CONFIG_KM_BOARD_NAME "kmeter1"
-#define CONFIG_KM_DEF_NETDEV "netdev=eth2\0"
-#elif defined CONFIG_TARGET_KMCOGE5NE
#define CONFIG_HOSTNAME "kmcoge5ne"
#define CONFIG_KM_BOARD_NAME "kmcoge5ne"
#define CONFIG_KM_DEF_NETDEV "netdev=eth1\0"
@@ -28,9 +23,6 @@
#define CONFIG_KM_UBI_PARTITION_NAME_BOOT "ubi0"
#define CONFIG_KM_UBI_PARTITION_NAME_APP "ubi1"
-#else
-#error ("Board not supported")
-#endif
/*
* High Level Configuration Options
@@ -169,10 +161,8 @@
#define CONFIG_UEC_ETH
#define CONFIG_ETHPRIME "UEC0"
-#if !defined(CONFIG_ARCH_MPC8309)
#define CONFIG_UEC_ETH1 /* GETH1 */
#define UEC_VERBOSE_DEBUG 1
-#endif
#ifdef CONFIG_UEC_ETH1
#define CONFIG_SYS_UEC1_UCC_NUM 3 /* UCC4 */
@@ -361,7 +351,6 @@
#define CONFIG_SYS_DDR_SDRAM_CFG2 0x00401000
-#ifdef CONFIG_TARGET_KMCOGE5NE
/**
* KMCOGE5NE has 512 MB RAM
*/
@@ -372,12 +361,6 @@
CSCONFIG_BANK_BIT_3 | \
CSCONFIG_ROW_BIT_13 | \
CSCONFIG_COL_BIT_10)
-#else
-#define CONFIG_SYS_DDR_CS0_CONFIG (CSCONFIG_EN | CSCONFIG_AP | \
- CSCONFIG_ROW_BIT_13 | \
- CSCONFIG_COL_BIT_10 | \
- CSCONFIG_ODT_WR_ONLY_CURRENT)
-#endif
#define CONFIG_SYS_DDR_CLK_CNTL (\
DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05)
@@ -457,7 +440,6 @@
OR_GPCM_TRLX | \
OR_GPCM_EAD)
-#ifdef CONFIG_TARGET_KMCOGE5NE
/*
* BFTIC3 on the local bus CS4
*/
@@ -476,7 +458,6 @@
OR_GPCM_SCY_2 |\
OR_GPCM_TRLX |\
OR_GPCM_EAD)
-#endif
/*
* MMU Setup
@@ -502,7 +483,6 @@
#define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U
-#ifdef CONFIG_TARGET_KMCOGE5NE
/* BFTIC3: icache cacheable, but dcache-inhibit and guarded */
#define CONFIG_SYS_IBAT6L (\
CONFIG_SYS_BFTIC3_BASE | \
@@ -542,15 +522,6 @@
#define CONFIG_TESTPIN_REG gprt3 /* for kmcoge5ne */
#define CONFIG_TESTPIN_MASK 0x20 /* for kmcoge5ne */
-#else
-#define CONFIG_SYS_IBAT6L (0)
-#define CONFIG_SYS_IBAT6U (0)
-#define CONFIG_SYS_IBAT7L (0)
-#define CONFIG_SYS_IBAT7U (0)
-#define CONFIG_SYS_DBAT6L CONFIG_SYS_IBAT6L
-#define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U
-#endif
-
#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
diff --git a/include/configs/kmeter1.h b/include/configs/kmeter1.h
index 00fb0e2f48..b4cadd3e0f 100644
--- a/include/configs/kmeter1.h
+++ b/include/configs/kmeter1.h
@@ -12,25 +12,9 @@
#define CONFIG_SYS_KMBEC_FPGA_BASE 0xE8000000
#define CONFIG_SYS_KMBEC_FPGA_SIZE 64
-#if defined CONFIG_TARGET_KMETER1
#define CONFIG_HOSTNAME "kmeter1"
#define CONFIG_KM_BOARD_NAME "kmeter1"
#define CONFIG_KM_DEF_NETDEV "netdev=eth2\0"
-#elif defined CONFIG_TARGET_KMCOGE5NE
-#define CONFIG_HOSTNAME "kmcoge5ne"
-#define CONFIG_KM_BOARD_NAME "kmcoge5ne"
-#define CONFIG_KM_DEF_NETDEV "netdev=eth1\0"
-#define CONFIG_NAND_ECC_BCH
-#define CONFIG_NAND_KMETER1
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define NAND_MAX_CHIPS 1
-#define CONFIG_SYS_NAND_BASE CONFIG_SYS_KMBEC_FPGA_BASE /* PRIO_BASE_ADDRESS */
-
-#define CONFIG_KM_UBI_PARTITION_NAME_BOOT "ubi0"
-#define CONFIG_KM_UBI_PARTITION_NAME_APP "ubi1"
-#else
-#error ("Board not supported")
-#endif
/*
* High Level Configuration Options
@@ -156,6 +140,7 @@
/*
* Serial Port
*/
+#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
@@ -169,10 +154,8 @@
#define CONFIG_UEC_ETH
#define CONFIG_ETHPRIME "UEC0"
-#if !defined(CONFIG_MPC8309)
#define CONFIG_UEC_ETH1 /* GETH1 */
#define UEC_VERBOSE_DEBUG 1
-#endif
#ifdef CONFIG_UEC_ETH1
#define CONFIG_SYS_UEC1_UCC_NUM 3 /* UCC4 */
@@ -361,23 +344,10 @@
#define CONFIG_SYS_DDR_SDRAM_CFG2 0x00401000
-#ifdef CONFIG_TARGET_KMCOGE5NE
-/**
- * KMCOGE5NE has 512 MB RAM
- */
-#define CONFIG_SYS_DDR_CS0_CONFIG (\
- CSCONFIG_EN | \
- CSCONFIG_AP | \
- CSCONFIG_ODT_WR_ONLY_CURRENT | \
- CSCONFIG_BANK_BIT_3 | \
- CSCONFIG_ROW_BIT_13 | \
- CSCONFIG_COL_BIT_10)
-#else
#define CONFIG_SYS_DDR_CS0_CONFIG (CSCONFIG_EN | CSCONFIG_AP | \
CSCONFIG_ROW_BIT_13 | \
CSCONFIG_COL_BIT_10 | \
CSCONFIG_ODT_WR_ONLY_CURRENT)
-#endif
#define CONFIG_SYS_DDR_CLK_CNTL (\
DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05)
@@ -457,27 +427,6 @@
OR_GPCM_TRLX | \
OR_GPCM_EAD)
-#ifdef CONFIG_TARGET_KMCOGE5NE
-/*
- * BFTIC3 on the local bus CS4
- */
-#define CONFIG_SYS_BFTIC3_BASE 0xB0000000
-#define CONFIG_SYS_BFTIC3_SIZE 256
-
-#define CONFIG_SYS_BR4_PRELIM (\
- CONFIG_SYS_BFTIC3_BASE |\
- (1 << BR_PS_SHIFT) | \
- BR_V)
-
-#define CONFIG_SYS_OR4_PRELIM (\
- MEG_TO_AM(CONFIG_SYS_BFTIC3_SIZE) |\
- OR_GPCM_CSNT | \
- OR_GPCM_ACS_DIV2 |\
- OR_GPCM_SCY_2 |\
- OR_GPCM_TRLX |\
- OR_GPCM_EAD)
-#endif
-
/*
* MMU Setup
*/
@@ -501,56 +450,12 @@
BATL_GUARDEDSTORAGE)
#define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U
-
-#ifdef CONFIG_TARGET_KMCOGE5NE
-/* BFTIC3: icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT6L (\
- CONFIG_SYS_BFTIC3_BASE | \
- BATL_PP_10 | \
- BATL_MEMCOHERENCE)
-
-#define CONFIG_SYS_IBAT6U (\
- CONFIG_SYS_BFTIC3_BASE | \
- BATU_BL_256M | \
- BATU_VS | \
- BATU_VP)
-
-#define CONFIG_SYS_DBAT6L (\
- CONFIG_SYS_BFTIC3_BASE | \
- BATL_PP_10 | \
- BATL_CACHEINHIBIT | \
- BATL_GUARDEDSTORAGE)
-
-#define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U
-
-/* DDR/LBC SDRAM next 256M: cacheable */
-#define CONFIG_SYS_IBAT7L (\
- CONFIG_SYS_SDRAM_BASE2 |\
- BATL_PP_10 |\
- BATL_CACHEINHIBIT |\
- BATL_GUARDEDSTORAGE)
-
-#define CONFIG_SYS_IBAT7U (\
- CONFIG_SYS_SDRAM_BASE2 |\
- BATU_BL_256M |\
- BATU_VS |\
- BATU_VP)
-/* enable POST tests */
-#define CONFIG_POST (CONFIG_SYS_POST_MEMORY|CONFIG_SYS_POST_MEM_REGIONS)
-#define CONFIG_POST_EXTERNAL_WORD_FUNCS /* use own functions, not generic */
-#define CPM_POST_WORD_ADDR CONFIG_SYS_MEMTEST_END
-#define CONFIG_TESTPIN_REG gprt3 /* for kmcoge5ne */
-#define CONFIG_TESTPIN_MASK 0x20 /* for kmcoge5ne */
-
-#else
#define CONFIG_SYS_IBAT6L (0)
#define CONFIG_SYS_IBAT6U (0)
#define CONFIG_SYS_IBAT7L (0)
#define CONFIG_SYS_IBAT7U (0)
#define CONFIG_SYS_DBAT6L CONFIG_SYS_IBAT6L
#define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U
-#endif
-
#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
--
2.16.4
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