[U-Boot] [PATCH 3/3] ARM: imx6: DHCOM i.MX6 PDK: ddr init for 32bit bus and 4GBit chips
Marek Vasut
marex at denx.de
Sun Sep 30 16:39:13 UTC 2018
On 07/05/2018 09:23 AM, lzenz at dh-electronics.de wrote:
> From: Ludwig Zenz <lzenz at dh-electronics.de>
>
> Support 1GIB + 2GIB DDR3 with 64bit bus width and 512MIB + 1GIB with 32bit bus width
>
> Signed-off-by: Ludwig Zenz <lzenz at dh-electronics.de>
> ---
> board/dhelectronics/dh_imx6/dh_imx6_spl.c | 191 +++++++++++++++++++++++++++---
> 1 file changed, 173 insertions(+), 18 deletions(-)
>
> diff --git a/board/dhelectronics/dh_imx6/dh_imx6_spl.c b/board/dhelectronics/dh_imx6/dh_imx6_spl.c
[...]
This patch causes memory instability on 1GiB MX6Q part.
Can you check that and fix it ? Thanks.
--
Best regards,
Marek Vasut
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