[U-Boot] [PATCH v3 1/7] riscv: Add a SYSCON driver for Andestech's PLIC

[Bin Meng]

On Mon, Apr 1, 2019 at 4:29 PM Andes <uboot at andestech.com> wrote:
>
> From: Rick Chen <rick at andestech.com>
>
> The Platform-Level Interrupt Controller (PLIC)
> block holds memory-mapped claim and pending registers
> associated with software interrupt. It is required
> for handling IPI.
>
> Signed-off-by: Rick Chen <rick at andestech.com>
> Cc: Greentime Hu <greentime at andestech.com>
> ---
> V3:
>  - Rename plic_init() as enable_ipi().
>  - Declase as static.
>  - Remove PLIC_BASE_GET() from enable_ipi().
>
>  arch/riscv/Kconfig                   |   9 +++
>  arch/riscv/include/asm/global_data.h |   3 +
>  arch/riscv/include/asm/syscon.h      |   2 +-
>  arch/riscv/lib/Makefile              |   1 +
>  arch/riscv/lib/andes_plic.c          | 110 +++++++++++++++++++++++++++++++++++
>  5 files changed, 124 insertions(+), 1 deletion(-)
>  create mode 100644 arch/riscv/lib/andes_plic.c
>

Reviewed-by: Bin Meng <bmeng.cn at gmail.com>