[U-Boot] [PATCH v3 3/7] riscv: ae350: disable ATCPIT100 timer

[Auer, Lukas]

Hi Rick,

On Mon, 2019-04-01 at 16:24 +0800, Andes wrote:
> From: Rick Chen <rick at andestech.com>
> 
> Disable ATCPIT100 SoC timer and replace by PLMT.
> 
> Signed-off-by: Rick Chen <rick at andestech.com>
> Cc: Greentime Hu <greentime at andestech.com>
> Reviewed-by: Bin Meng <bmeng.cn at gmail.com>
> ---
>  configs/ae350_rv32_defconfig | 1 -
>  configs/ae350_rv64_defconfig | 1 -
>  2 files changed, 2 deletions(-)
> 
> diff --git a/configs/ae350_rv32_defconfig b/configs/ae350_rv32_defconfig
> index 5837b48..e13c7de 100644
> --- a/configs/ae350_rv32_defconfig
> +++ b/configs/ae350_rv32_defconfig
> @@ -33,4 +33,3 @@ CONFIG_BAUDRATE=38400
>  CONFIG_SYS_NS16550=y
>  CONFIG_SPI=y
>  CONFIG_ATCSPI200_SPI=y
> -CONFIG_ATCPIT100_TIMER=y
> diff --git a/configs/ae350_rv64_defconfig b/configs/ae350_rv64_defconfig
> index b250d3f..a41f918 100644
> --- a/configs/ae350_rv64_defconfig
> +++ b/configs/ae350_rv64_defconfig
> @@ -34,4 +34,3 @@ CONFIG_BAUDRATE=38400
>  CONFIG_SYS_NS16550=y
>  CONFIG_SPI=y
>  CONFIG_ATCSPI200_SPI=y
> -CONFIG_ATCPIT100_TIMER=y

This may break bisectability, since the board won't have a working
timer until the next patch. You may consider squashing them.

Other than that.

Reviewed-by: Lukas Auer <lukas.auer at aisec.fraunhofer.de>

Thanks,
Lukas