[U-Boot] [PATCH v4 1/6] riscv: Add a SYSCON driver for Andestech's PLIC

[Auer, Lukas]

On Tue, 2019-04-02 at 15:56 +0800, Andes wrote:
> From: Rick Chen <rick at andestech.com>
> 
> The Platform-Level Interrupt Controller (PLIC)
> block holds memory-mapped claim and pending registers
> associated with software interrupt. It is required
> for handling IPI.
> 
> Signed-off-by: Rick Chen <rick at andestech.com>
> Cc: Greentime Hu <greentime at andestech.com>
> Reviewed-by: Bin Meng <bmeng.cn at gmail.com>
> ---
> Changes in V4:
> - Drop the empty comment line
> - Check return value after cpu_get_count()
> - Rename nds_plic as andes_plic
> - Fix checkpatch error issues
> 
>  arch/riscv/Kconfig                   |   9 +++
>  arch/riscv/include/asm/global_data.h |   3 +
>  arch/riscv/include/asm/syscon.h      |   3 +-
>  arch/riscv/lib/Makefile              |   1 +
>  arch/riscv/lib/andes_plic.c          | 113 +++++++++++++++++++++++++++++++++++
>  5 files changed, 127 insertions(+), 2 deletions(-)
>  create mode 100644 arch/riscv/lib/andes_plic.c
> 

Looks good now, thanks!

Reviewed-by: Lukas Auer <lukas.auer at aisec.fraunhofer.de>