[U-Boot] [PATCH v1 11/14] colibri-imx6ull: migrate fec to using driver model

[Igor Opaniuk]

Reviewed-by: Igor Opaniuk <igor.opaniuk at toradex.com>

On Fri, Mar 29, 2019 at 1:39 PM Marcel Ziswiler <marcel at ziswiler.com> wrote:
>
> From: Marcel Ziswiler <marcel.ziswiler at toradex.com>
>
> Migrate Ethernet FEC to using driver model.
> Drop PHY_MICREL_KSZ90X1 which slipped in from Apalis iMX6.
>
> Signed-off-by: Marcel Ziswiler <marcel.ziswiler at toradex.com>
>
> ---
>
>  arch/arm/dts/imx6ull-colibri.dts  | 31 ++++++++++++++++---------------
>  configs/colibri-imx6ull_defconfig |  3 +--
>  include/configs/colibri-imx6ull.h |  4 ----
>  3 files changed, 17 insertions(+), 21 deletions(-)
>
> diff --git a/arch/arm/dts/imx6ull-colibri.dts b/arch/arm/dts/imx6ull-colibri.dts
> index 91e48aab61..2f8865c29c 100644
> --- a/arch/arm/dts/imx6ull-colibri.dts
> +++ b/arch/arm/dts/imx6ull-colibri.dts
> @@ -80,6 +80,7 @@
>         pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1_cs>;
>  };
>
> +/* Ethernet */
>  &fec2 {
>         pinctrl-names = "default";
>         pinctrl-0 = <&pinctrl_enet2>;
> @@ -233,6 +234,21 @@
>  };
>
>  &iomuxc {
> +       pinctrl_enet2: enet2-grp {
> +               fsl,pins = <
> +                       MX6UL_PAD_GPIO1_IO06__ENET2_MDIO        0x1b0b0
> +                       MX6UL_PAD_GPIO1_IO07__ENET2_MDC         0x1b0b0
> +                       MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
> +                       MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
> +                       MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN      0x1b0b0
> +                       MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER      0x1b0b0
> +                       MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2  0x4001b031
> +                       MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
> +                       MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
> +                       MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN      0x1b0b0
> +               >;
> +       };
> +
>         pinctrl_gpio1: gpio1-grp {
>                 fsl,pins = <
>                         MX6UL_PAD_ENET1_RX_DATA0__GPIO2_IO00    0x74 /* SODIMM 55 */
> @@ -295,21 +311,6 @@
>                 >;
>         };
>
> -       pinctrl_enet2: enet2-grp {
> -               fsl,pins = <
> -                       MX6UL_PAD_GPIO1_IO06__ENET2_MDIO        0x1b0b0
> -                       MX6UL_PAD_GPIO1_IO07__ENET2_MDC         0x1b0b0
> -                       MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
> -                       MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
> -                       MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN      0x1b0b0
> -                       MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER      0x1b0b0
> -                       MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2  0x4001b031
> -                       MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
> -                       MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
> -                       MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN      0x1b0b0
> -               >;
> -       };
> -
>         pinctrl_ecspi1_cs: ecspi1-cs-grp {
>                 fsl,pins = <
>                         MX6UL_PAD_LCD_DATA21__GPIO3_IO26        0x000a0
> diff --git a/configs/colibri-imx6ull_defconfig b/configs/colibri-imx6ull_defconfig
> index 0440b4ed94..a24c87f321 100644
> --- a/configs/colibri-imx6ull_defconfig
> +++ b/configs/colibri-imx6ull_defconfig
> @@ -58,9 +58,8 @@ CONFIG_NAND_MXS=y
>  CONFIG_NAND_MXS_DT=y
>  CONFIG_MTD_UBI_FASTMAP=y
>  CONFIG_PHYLIB=y
> -CONFIG_PHY_ADDR_ENABLE=y
>  CONFIG_PHY_MICREL=y
> -CONFIG_PHY_MICREL_KSZ90X1=y
> +CONFIG_DM_ETH=y
>  CONFIG_FEC_MXC=y
>  CONFIG_MII=y
>  CONFIG_PINCTRL=y
> diff --git a/include/configs/colibri-imx6ull.h b/include/configs/colibri-imx6ull.h
> index 7a7a70e457..fc39e807b6 100644
> --- a/include/configs/colibri-imx6ull.h
> +++ b/include/configs/colibri-imx6ull.h
> @@ -19,10 +19,6 @@
>  #define CONFIG_SYS_MALLOC_LEN          (32 * SZ_1M)
>
>  /* Network */
> -#define CONFIG_FEC_XCV_TYPE             RMII
> -#define CONFIG_ETHPRIME                 "FEC"
> -#define CONFIG_FEC_MXC_PHYADDR         0
> -
>  #define CONFIG_IP_DEFRAG
>  #define CONFIG_TFTP_BLOCKSIZE          16352
>  #define CONFIG_TFTP_TSIZE
> --
> 2.20.1
>
> _______________________________________________
> U-Boot mailing list
> U-Boot at lists.denx.de
> https://lists.denx.de/listinfo/u-boot



-- 
Best regards - Freundliche Grüsse - Meilleures salutations

Senior Development Engineer,
Igor Opaniuk

Toradex AG
Altsagenstrasse 5 | 6048 Horw/Luzern | Switzerland | T: +41 41 500 48
00 (main line)