[U-Boot] [PATCH v2 04/10] pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' iomux

David Wu david.wu at rock-chips.com
Thu Apr 4 03:51:34 UTC 2019


RK3288 pmu_gpio0 iomux setting have no higher 16 writing corresponding
bits, need to read before write the register.

Signed-off-by: David Wu <david.wu at rock-chips.com>
---

 drivers/pinctrl/rockchip/pinctrl-rk3288.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3288.c b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
index 1fa601d954..d66ffdf24b 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3288.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
@@ -54,7 +54,13 @@ static int rk3288_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
 		}
 	}
 
-	data = (mask << (bit + 16));
+	if (bank->bank_num == 0) {
+		regmap_read(regmap, reg, &data);
+		data &= ~(mask << bit);
+	} else {
+		data = (mask << (bit + 16));
+	}
+
 	data |= (mux & mask) << bit;
 	ret = regmap_write(regmap, reg, data);
 
-- 
2.19.1





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