[U-Boot] [PATCH 0/2] Add Kconfig to disable cache ops
Vignesh Raghavendra
vigneshr at ti.com
Mon Apr 8 17:02:58 UTC 2019
This series adds a Kconfig to disable cache maintenance operations on
a coherent architectures. And disable cache flush/invalidate ops for
SPL/U-Boot code running on A53 core of AM654 SoC(which is IO coherent)
Vignesh Raghavendra (2):
arch: armv8: Provide a way to disable cache maintenance ops
board: ti: am654: select SYS_DISABLE_DCACHE_OPS for arm64 build
arch/Kconfig | 9 +++++++++
arch/arm/cpu/armv8/cache_v8.c | 18 ++++++++++++++++++
board/ti/am65x/Kconfig | 1 +
3 files changed, 28 insertions(+)
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2.21.0
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