[U-Boot] [PATCH 1/2] mmc: mv_sdhci: add driver model support

Stefan Roese sr at denx.de
Thu Apr 11 09:24:23 UTC 2019


On 11.04.19 04:56, Pierre Bourdon wrote:
> The new DM implementation currently does not support the Sheeva
> 88SV331xV5 specific quirk present in the legacy implementation. The
> legacy code is thus kept for this SoC and others not yet migrated to
> DM_MMC.
> 
> Signed-off-by: Pierre Bourdon <delroth at gmail.com>
> Cc: Jaehoon Chung <jh80.chung at samsung.com>
> Cc: Stefan Roese <sr at denx.de>
> ---
>   arch/arm/mach-mvebu/cpu.c              |  2 +-
>   arch/arm/mach-mvebu/include/mach/cpu.h |  2 +
>   drivers/mmc/mv_sdhci.c                 | 67 +++++++++++++++++++++++++-
>   3 files changed, 69 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c
> index 919d05c88c..ced9b5480a 100644
> --- a/arch/arm/mach-mvebu/cpu.c
> +++ b/arch/arm/mach-mvebu/cpu.c
> @@ -491,7 +491,7 @@ int arch_misc_init(void)
>   }
>   #endif /* CONFIG_ARCH_MISC_INIT */
>   
> -#ifdef CONFIG_MMC_SDHCI_MV
> +#if defined(CONFIG_MMC_SDHCI_MV) && !defined(CONFIG_DM_MMC)
>   int board_mmc_init(bd_t *bis)
>   {
>   	mv_sdh_init(MVEBU_SDIO_BASE, 0, 0,
> diff --git a/arch/arm/mach-mvebu/include/mach/cpu.h b/arch/arm/mach-mvebu/include/mach/cpu.h
> index 9e23043a48..42456a8b33 100644
> --- a/arch/arm/mach-mvebu/include/mach/cpu.h
> +++ b/arch/arm/mach-mvebu/include/mach/cpu.h
> @@ -141,7 +141,9 @@ u32 mvebu_get_nand_clock(void);
>   
>   void return_to_bootrom(void);
>   
> +#ifndef CONFIG_DM_MMC
>   int mv_sdh_init(unsigned long regbase, u32 max_clk, u32 min_clk, u32 quirks);
> +#endif
>   
>   void get_sar_freq(struct sar_freq_modes *sar_freq);
>   
> diff --git a/drivers/mmc/mv_sdhci.c b/drivers/mmc/mv_sdhci.c
> index de4ae0a0e7..bf26d2e4e2 100644
> --- a/drivers/mmc/mv_sdhci.c
> +++ b/drivers/mmc/mv_sdhci.c
> @@ -4,10 +4,13 @@
>    */
>   
>   #include <common.h>
> +#include <dm.h>
>   #include <malloc.h>
>   #include <sdhci.h>
>   #include <linux/mbus.h>
>   
> +#define MVSDH_NAME "mv_sdh"
> +
>   #define SDHCI_WINDOW_CTRL(win)		(0x4080 + ((win) << 4))
>   #define SDHCI_WINDOW_BASE(win)		(0x4084 + ((win) << 4))
>   
> @@ -36,6 +39,8 @@ static void sdhci_mvebu_mbus_config(void __iomem *base)
>   	}
>   }
>   
> +#ifndef CONFIG_DM_MMC
> +
>   #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS
>   static struct sdhci_ops mv_ops;
>   
> @@ -63,7 +68,6 @@ static inline void mv_sdhci_writeb(struct sdhci_host *host, u8 val, int reg)
>   #endif /* CONFIG_SHEEVA_88SV331xV5 */
>   #endif /* CONFIG_MMC_SDHCI_IO_ACCESSORS */
>   
> -static char *MVSDH_NAME = "mv_sdh";
>   int mv_sdh_init(unsigned long regbase, u32 max_clk, u32 min_clk, u32 quirks)
>   {
>   	struct sdhci_host *host = NULL;
> @@ -90,3 +94,64 @@ int mv_sdh_init(unsigned long regbase, u32 max_clk, u32 min_clk, u32 quirks)
>   
>   	return add_sdhci(host, 0, min_clk);
>   }
> +
> +#else
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +struct mv_sdhci_plat {
> +	struct mmc_config cfg;
> +	struct mmc mmc;
> +};
> +
> +static int mv_sdhci_probe(struct udevice *dev)
> +{
> +	struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
> +	struct mv_sdhci_plat *plat = dev_get_platdata(dev);
> +	struct sdhci_host *host = dev_get_priv(dev);
> +	int ret;
> +
> +	host->name = MVSDH_NAME;
> +	host->ioaddr = (void *)devfdt_get_addr(dev);
> +	host->quirks = SDHCI_QUIRK_32BIT_DMA_ADDR | SDHCI_QUIRK_WAIT_SEND_CMD;
> +
> +	ret = sdhci_setup_cfg(&plat->cfg, host, 0, 0);
> +	if (ret)
> +		return ret;
> +
> +	if (CONFIG_IS_ENABLED(ARCH_MVEBU)) {
> +		/* Configure SDHCI MBUS mbus bridge windows */
> +		sdhci_mvebu_mbus_config(host->ioaddr);
> +	}
> +
> +	host->mmc = &plat->mmc;
> +	host->mmc->dev = dev;
> +	host->mmc->priv = host;
> +	upriv->mmc = host->mmc;
> +
> +	return sdhci_probe(dev);
> +}
> +
> +static int mv_sdhci_bind(struct udevice *dev)
> +{
> +	struct mv_sdhci_plat *plat = dev_get_platdata(dev);
> +
> +	return sdhci_bind(dev, &plat->mmc, &plat->cfg);
> +}
> +
> +static const struct udevice_id mv_sdhci_ids[] = {
> +	{ .compatible = "marvell,armada-380-sdhci" },
> +	{ }
> +};
> +
> +U_BOOT_DRIVER(mv_sdhci_drv) = {
> +	.name		= MVSDH_NAME,
> +	.id		= UCLASS_MMC,
> +	.of_match	= mv_sdhci_ids,
> +	.bind		= mv_sdhci_bind,
> +	.probe		= mv_sdhci_probe,
> +	.ops		= &sdhci_ops,
> +	.priv_auto_alloc_size = sizeof(struct sdhci_host),
> +	.platdata_auto_alloc_size = sizeof(struct mv_sdhci_plat),
> +};
> +#endif /* CONFIG_DM_MMC */
> 

Thanks for working on this. Looks good, so:

Reviewed-by: Stefan Roese <sr at denx.de>

Thanks,
Stefan


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