[U-Boot] [PATCH v2 2/2] ARM: mvebu: sync db-88f6820-amc.dts with Linux v5.0
Chris Packham
judge.packham at gmail.com
Thu Apr 11 20:47:05 UTC 2019
Sync armada-385-db-88f6820-amc.dts with Linux. Retain the
u-boot,dm-pre-reloc and nand differences.
Signed-off-by: Chris Packham <judge.packham at gmail.com>
---
Changes in v2:
- rebase against u-boot-marvell/master
arch/arm/dts/armada-385-db-88f6820-amc.dts | 184 +++++++++------------
1 file changed, 82 insertions(+), 102 deletions(-)
diff --git a/arch/arm/dts/armada-385-db-88f6820-amc.dts b/arch/arm/dts/armada-385-db-88f6820-amc.dts
index c9ccbb57fff5..59a425f6b155 100644
--- a/arch/arm/dts/armada-385-db-88f6820-amc.dts
+++ b/arch/arm/dts/armada-385-db-88f6820-amc.dts
@@ -1,51 +1,19 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
- * Device Tree file for Marvell Armada 385 development board
+ * Device Tree file for Marvell Armada 385 AMC board
* (DB-88F6820-AMC)
*
- * Copyright (C) 2014 Marvell
- *
- * Gregory CLEMENT <gregory.clement at free-electrons.com>
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- * a) This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without
- * any warranty of any kind, whether express or implied.
- *
- * Or, alternatively,
- *
- * b) Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use,
- * copy, modify, merge, publish, distribute, sublicense, and/or
- * sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following
- * conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
+ * Copyright (C) 2017 Allied Telesis Labs
*/
/dts-v1/;
#include "armada-385.dtsi"
+
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Marvell Armada 385 AMC";
- compatible = "marvell,a385-amc", "marvell,armada385", "marvell,armada380";
+ compatible = "marvell,a385-db-amc", "marvell,armada385", "marvell,armada380";
chosen {
stdout-path = "serial0:115200n8";
@@ -60,90 +28,88 @@
memory {
device_type = "memory";
- reg = <0x00000000 0x80000000>; /* 2 GB */
+ reg = <0x00000000 0x80000000>; /* 2GB */
};
soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
+ };
+};
- internal-regs {
- i2c at 11000 {
- clock-frequency = <100000>;
- u-boot,i2c-slave-addr = <0x0>;
- pinctrl-names = "default";
- pinctrl-0 = <&i2c0_pins>;
- status = "okay";
- };
-
- serial at 12000 {
- /*
- * Exported on the micro USB connector CON16
- * through an FTDI
- */
+&i2c0 {
+ u-boot,i2c-slave-addr = <0x0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins>;
+ status = "okay";
+};
- pinctrl-names = "default";
- pinctrl-0 = <&uart0_pins>;
- status = "okay";
- u-boot,dm-pre-reloc;
- };
+&uart0 {
+ /*
+ * Exported on the micro USB connector CON3
+ * through an FTDI
+ */
- ethernet at 34000 {
- status = "okay";
- phy = <&phy1>;
- phy-mode = "sgmii";
- };
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins>;
+ status = "okay";
+ u-boot,dm-pre-reloc;
+};
- usb at 58000 {
- status = "okay";
- };
- ethernet at 70000 {
- pinctrl-names = "default";
- /*
- * The Reference Clock 0 is used to provide a
- * clock to the PHY
- */
- pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>;
- status = "okay";
- phy = <&phy0>;
- phy-mode = "rgmii-id";
- };
+ð0 {
+ pinctrl-names = "default";
+ /*
+ * The Reference Clock 0 is used to provide a
+ * clock to the PHY
+ */
+ pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>;
+ status = "okay";
+ phy = <&phy0>;
+ phy-mode = "rgmii-id";
+};
+ð2 {
+ status = "okay";
+ phy = <&phy1>;
+ phy-mode = "sgmii";
+};
- mdio at 72004 {
- pinctrl-names = "default";
- pinctrl-0 = <&mdio_pins>;
+&usb0 {
+ status = "okay";
+};
- phy0: ethernet-phy at 1 {
- reg = <1>;
- };
- phy1: ethernet-phy at 0 {
- reg = <0>;
- };
- };
- flash at d0000 {
- status = "okay";
- num-cs = <1>;
- marvell,nand-keep-config;
- marvell,nand-enable-arbiter;
- nand-on-flash-bbt;
- };
- };
+&mdio {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mdio_pins>;
- pcie {
- status = "okay";
- pcie at 1,0 {
- /* Port 0, Lane 0 */
- status = "okay";
- };
+ phy0: ethernet-phy at 1 {
+ reg = <1>;
+ };
- };
+ phy1: ethernet-phy at 0 {
+ reg = <0>;
};
};
+&nand_controller {
+ status = "okay";
+ marvell,nand-keep-config;
+ marvell,nand-enable-arbiter;
+ nand-on-flash-bbt;
+};
+
+&pciec {
+ status = "okay";
+};
+
+&pcie1 {
+ /* Port 0, Lane 0 */
+ status = "okay";
+};
+
&spi1 {
pinctrl-names = "default";
pinctrl-0 = <&spi1_pins>;
@@ -154,10 +120,24 @@
u-boot,dm-pre-reloc;
#address-cells = <1>;
#size-cells = <1>;
- compatible = "st,m25p128", "jedec,spi-nor", "spi-flash";
+ compatible = "jedec,spi-nor";
reg = <0>; /* Chip select 0 */
spi-max-frequency = <50000000>;
m25p,fast-read;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ partition at 0 {
+ reg = <0x00000000 0x00100000>;
+ label = "u-boot";
+ };
+ partition at 100000 {
+ reg = <0x00100000 0x00040000>;
+ label = "u-boot-env";
+ };
+ };
};
};
--
2.21.0
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