[U-Boot] [PATCH v3 06/10] pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' drive strength

[David Wu]

RK3288 pmu_gpio0 drive strength setting have no higher 16 writing
corresponding bits, need to read before write the register.

Signed-off-by: David Wu <david.wu at rock-chips.com>
---

Change in v3:
- Add some comment

 drivers/pinctrl/rockchip/pinctrl-rk3288.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3288.c b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
index 6ae9f1c76e..d1b9aeb3d9 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3288.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
@@ -143,8 +143,15 @@ static int rk3288_set_drive(struct rockchip_pin_bank *bank,
 		return ret;
 	}
 
-	/* enable the write to the equivalent lower bits */
-	data = ((1 << ROCKCHIP_DRV_BITS_PER_PIN) - 1) << (bit + 16);
+	/* bank0 is special, there are no higher 16 bit writing bits. */
+	if (bank->bank_num == 0) {
+		regmap_read(regmap, reg, &data);
+		data &= ~(((1 << ROCKCHIP_DRV_BITS_PER_PIN) - 1) << bit);
+	} else {
+		/* enable the write to the equivalent lower bits */
+		data = ((1 << ROCKCHIP_DRV_BITS_PER_PIN) - 1) << (bit + 16);
+	}
+
 	data |= (ret << bit);
 	ret = regmap_write(regmap, reg, data);
 	return ret;
-- 
2.19.1