[U-Boot] [PATCH v5] arm: socfpga: move gen5 SDR driver to DM

[Marek Vasut]

On 4/16/19 10:04 PM, Simon Goldschmidt wrote:
> To clean up reset handling for socfpga gen5, port the DDR driver to DM
> using UCLASS_RAM and implement proper reset handling.
> 
> This gets us rid of one ad-hoc call to socfpga_per_reset().
> 
> The gen5 driver is implemented in 2 distinct files. One of it (containing
> the calibration training) is not touched much and is kept at using
> hard coded addresses since the code grows even more otherwise.
> 
> SPL is changed from calling hard into the DDR driver code to just
> probing UCLASS_RESET and UCLASS_RAM. It is happy after finding a RAM
> driver after that.
> 
> Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt at gmail.com>
> ---
> 
> Changes in v5:
> - fix Kconfig dependencies so that non-gen5 socfpga is fixed
> 
> Changes in v2:
> - port DDR driver to DM UCLASS_RAM
> - don't change DDR calibration training driver (code got too big)
> - use reset.h code instead of socfpga_per_reset()
> 
> For v5, this is the only patch left with changes (all other patches
> are OK from v4, but this one needed changes). Being like that, this
> patch alone isn't applicable but needs all other patches from v4.

Applied, thanks.

-- 
Best regards,
Marek Vasut