[U-Boot] [PATCH v1 1/5] CONFIG_SYS_[ID]CACHE_OFF: unify the 'any' case

[Trevor Woerner]

According to De Morgan's Law[1]:
	!(A && B) = !A || !B
	!(A || B) = !A && !B

There are 5 places in the code where we find:
	#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
and 4 places in the code where we find:
	#if (!defined(CONFIG_SYS_ICACHE_OFF) || !defined(CONFIG_SYS_DCACHE_OFF))

In words, the construct:
	!defined(CONFIG_SYS_[DI]CACHE_OFF)
means:
	"is the [DI]CACHE on?"
and the construct:
	defined(CONFIG_SYS_[DI]CACHE_OFF)
means:
	"is the [DI]CACHE off?"

Therefore
	!(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
means:
	"the opposite of 'are they both off?'"
in other words:
	"are either or both on?"
and:
	(!defined(CONFIG_SYS_ICACHE_OFF) || !defined(CONFIG_SYS_DCACHE_OFF)
means:
	"are either or both on?"

As a result, I've converted the 4 instances of '(!A || !B)' to '!(A && B)' for
consistency.

[1] https://en.wikipedia.org/wiki/De_Morgan%27s_laws

Signed-off-by: Trevor Woerner <trevor at toganlabs.com>
---

 arch/arm/cpu/arm11/cpu.c     | 2 +-
 arch/nds32/cpu/n1213/start.S | 2 +-
 arch/nds32/lib/cache.c       | 2 +-
 arch/xtensa/cpu/start.S      | 3 +--
 4 files changed, 4 insertions(+), 5 deletions(-)

diff --git a/arch/arm/cpu/arm11/cpu.c b/arch/arm/cpu/arm11/cpu.c
index 41feeefec1..4aa704b9ee 100644
--- a/arch/arm/cpu/arm11/cpu.c
+++ b/arch/arm/cpu/arm11/cpu.c
@@ -97,7 +97,7 @@ void flush_dcache_all(void)
 }
 #endif /* #ifndef CONFIG_SYS_DCACHE_OFF */
 
-#if !defined(CONFIG_SYS_ICACHE_OFF) || !defined(CONFIG_SYS_DCACHE_OFF)
+#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
 void enable_caches(void)
 {
 #ifndef CONFIG_SYS_ICACHE_OFF
diff --git a/arch/nds32/cpu/n1213/start.S b/arch/nds32/cpu/n1213/start.S
index cf966e2132..4e6a0e7a31 100644
--- a/arch/nds32/cpu/n1213/start.S
+++ b/arch/nds32/cpu/n1213/start.S
@@ -129,7 +129,7 @@ set_ivb:
 	mfsr	$r1, $mr8
 	and	$r1, $r1, $r0
 	mtsr	$r1, $mr8
-#if (!defined(CONFIG_SYS_ICACHE_OFF) || !defined(CONFIG_SYS_DCACHE_OFF))
+#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
 /*
  * MMU_CTL NTC0 Cacheable/Write-Back
  */
diff --git a/arch/nds32/lib/cache.c b/arch/nds32/lib/cache.c
index 9ab30d1965..3e5aa7cda8 100644
--- a/arch/nds32/lib/cache.c
+++ b/arch/nds32/lib/cache.c
@@ -6,7 +6,7 @@
  */
 
 #include <common.h>
-#if (!defined(CONFIG_SYS_ICACHE_OFF) || !defined(CONFIG_SYS_DCACHE_OFF))
+#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
 static inline unsigned long CACHE_SET(unsigned char cache)
 {
 	if (cache == ICACHE)
diff --git a/arch/xtensa/cpu/start.S b/arch/xtensa/cpu/start.S
index 66acb4c610..0fafb1c4f8 100644
--- a/arch/xtensa/cpu/start.S
+++ b/arch/xtensa/cpu/start.S
@@ -164,8 +164,7 @@ _start:
 	 * enable data/instruction cache for relocated image.
 	 */
 #if XCHAL_HAVE_SPANNING_WAY && \
-	(!defined(CONFIG_SYS_DCACHE_OFF) || \
-	 !defined(CONFIG_SYS_ICACHE_OFF))
+	!(defined(CONFIG_SYS_DCACHE_OFF) && defined(CONFIG_SYS_ICACHE_OFF))
 	srli	a7, a4, 29
 	slli	a7, a7, 29
 	addi	a7, a7, XCHAL_SPANNING_WAY
-- 
2.21.0.rc2