[U-Boot] [PATCH 4/6] ARM: dts: stm32: Add Ethernet support on stm32mp1

[Patrick DELAUNAY]

Hi Christophe,

> 
> This patch add Ethernet support on stm32mp157 eval board
> 
> Signed-off-by: Christophe Roullier <christophe.roullier at st.com>
> ---
> 
>  arch/arm/dts/stm32mp157-pinctrl.dtsi | 31
> +++++++++++++++++++++++++++++++
>  arch/arm/dts/stm32mp157c-ev1.dts     | 21 +++++++++++++++++++++
>  arch/arm/dts/stm32mp157c.dtsi        | 35
> +++++++++++++++++++++++++++++++++++
>  3 files changed, 87 insertions(+)
> 
> diff --git a/arch/arm/dts/stm32mp157-pinctrl.dtsi b/arch/arm/dts/stm32mp157-
> pinctrl.dtsi
> index 85da592..66723b0 100644
> --- a/arch/arm/dts/stm32mp157-pinctrl.dtsi
> +++ b/arch/arm/dts/stm32mp157-pinctrl.dtsi
> @@ -157,6 +157,37 @@
>  				};
>  			};
> 
> +			ethernet0_rgmii_pins_a: rgmii-0 {
> +				pins1 {
> +					pinmux = <STM32_PINMUX('G', 5,
> AF11)>, /* ETH_RGMII_CLK125 */
> +						 <STM32_PINMUX('G', 4, AF11)>,
> /* ETH_RGMII_GTX_CLK */
> +						 <STM32_PINMUX('G', 13,
> AF11)>, /* ETH_RGMII_TXD0 */
> +						 <STM32_PINMUX('G', 14,
> AF11)>, /* ETH_RGMII_TXD1 */
> +						 <STM32_PINMUX('C', 2, AF11)>,
> /* ETH_RGMII_TXD2 */
> +						 <STM32_PINMUX('E', 2, AF11)>,
> /* ETH_RGMII_TXD3 */
> +						 <STM32_PINMUX('B', 11,
> AF11)>, /* ETH_RGMII_TX_CTL */
> +						 <STM32_PINMUX('C', 1, AF11)>;
> /* ETH_MDC */
> +					bias-disable;
> +					drive-push-pull;
> +					slew-rate = <2>;
> +				};
> +				pins2 {
> +					pinmux = <STM32_PINMUX('A', 2,
> AF11)>; /* ETH_MDIO */
> +					bias-disable;
> +					drive-push-pull;
> +					slew-rate = <0>;
> +				};
> +				pins3 {
> +					pinmux = <STM32_PINMUX('C', 4,
> AF11)>, /* ETH_RGMII_RXD0 */
> +						 <STM32_PINMUX('C', 5, AF11)>,
> /* ETH_RGMII_RXD1 */
> +						 <STM32_PINMUX('B', 0, AF11)>,
> /* ETH_RGMII_RXD2 */
> +						 <STM32_PINMUX('B', 1, AF11)>,
> /* ETH_RGMII_RXD3 */
> +						 <STM32_PINMUX('A', 1, AF11)>,
> /* ETH_RGMII_RX_CLK */
> +						 <STM32_PINMUX('A', 7, AF11)>;
> /* ETH_RGMII_RX_CTL */
> +					bias-disable;
> +				};
> +			};
> +
>  			i2c1_pins_a: i2c1-0 {
>  				pins {
>  					pinmux = <STM32_PINMUX('D', 12,
> AF5)>, /* I2C1_SCL */ diff --git a/arch/arm/dts/stm32mp157c-ev1.dts
> b/arch/arm/dts/stm32mp157c-ev1.dts
> index 902a42b..bdbf7fb 100644
> --- a/arch/arm/dts/stm32mp157c-ev1.dts
> +++ b/arch/arm/dts/stm32mp157c-ev1.dts
> @@ -11,6 +11,9 @@
>  	model = "STMicroelectronics STM32MP157C eval daughter on eval
> mother";
>  	compatible = "st,stm32mp157c-ev1", "st,stm32mp157c-ed1",
> "st,stm32mp157";
> 
> +	aliases {
> +		ethernet0 = &ethernet0;
> +	};
>  };
> 
>  &cec {
> @@ -19,6 +22,24 @@
>  	status = "okay";
>  };
> 
> +&ethernet0 {
> +	status = "okay";
> +	pinctrl-0 = <&ethernet0_rgmii_pins_a>;
> +	pinctrl-names = "default";
> +	phy-mode = "rgmii-id";
> +	max-speed = <1000>;
> +	phy-handle = <&phy0>;
> +
> +	mdio0 {
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +		compatible = "snps,dwmac-mdio";
> +		phy0: ethernet-phy at 0 {
> +			reg = <0>;
> +		};
> +	};
> +};
> +
>  &i2c2 {
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&i2c2_pins_a>;
> diff --git a/arch/arm/dts/stm32mp157c.dtsi b/arch/arm/dts/stm32mp157c.dtsi index
> 37cadfa..1271abf 100644
> --- a/arch/arm/dts/stm32mp157c.dtsi
> +++ b/arch/arm/dts/stm32mp157c.dtsi
> @@ -915,6 +915,41 @@
>  			status = "disabled";
>  		};
> 
> +		stmmac_axi_config_0: stmmac-axi-config {
> +			snps,wr_osr_lmt = <0x7>;
> +			snps,rd_osr_lmt = <0x7>;
> +			snps,blen = <0 0 0 0 16 8 4>;
> +		};
> +
> +		ethernet0: ethernet at 5800a000 {
> +			compatible = "st,stm32mp1-dwmac", "snps,dwmac-4.20a";
> +			reg = <0x5800a000 0x2000>;
> +			reg-names = "stmmaceth";
> +			interrupts-extended =
> +				<&intc GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
> +				<&intc GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
> +				<&exti 70 1>;
> +			interrupt-names = "macirq",
> +					  "eth_wake_irq",
> +					  "stm32_pwr_wakeup";
> +			clock-names = "stmmaceth",
> +				      "mac-clk-tx",
> +				      "mac-clk-rx",
> +				      "ethstp";
> +			clocks = <&rcc ETHMAC>,
> +				 <&rcc ETHTX>,
> +				 <&rcc ETHRX>,
> +				 <&rcc ETHSTP>;
> +			st,syscon = <&syscfg 0x4>;
> +			snps,mixed-burst;
> +			snps,pbl = <2>;
> +			snps,en-tx-lpi-clockgating;
> +			snps,axi-config = <&stmmac_axi_config_0>;
> +			snps,tso;
> +			power-domains = <&pd_core>;
> +			status = "disabled";
> +		};
> +
>  		usbh_ohci: usbh-ohci at 5800c000 {
>  			compatible = "generic-ohci";
>  			reg = <0x5800c000 0x1000>;
> --
> 2.7.4

For stm32mp1 boards EV1 and DK2
Test done with master (SHA1 = 75ce8c938d39bd22460be66e6bf318bd2410c17b)

Tested-by: Patrick Delaunay <patrick.delaunay at st.com>
Acked-by: Patrick Delaunay <patrick.delaunay at st.com>

Regards
Patrick