[U-Boot] [U-Boot, 3/8] rockchip: spi: fix off-by-one in chunk size computation
philipp.tomsich at theobroma-systems.com
Tue Apr 23 14:31:20 UTC 2019
> The maximum transfer length (in a single transaction) for the Rockchip
> SPI controller is 64Kframes (i.e. 0x10000 frames) of 8bit or 16bit
> frames and is encoded as (num_frames - 1) in CTRLR1. The existing
> code subtracted the "minus 1" twice for a maximum transfer length of
> 0xffff (64K - 1) frames.
> While this is not strictly an error (the existing code is correct, but
> leads to a bit of head-scrating), fix this off-by-one situation.
> Signed-off-by: Philipp Tomsich <philipp.tomsich at theobroma-systems.com>
> drivers/spi/rk_spi.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Applied to u-boot-rockchip, thanks!
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