[U-Boot] [PATCH 1/5] Kconfig: qspi: Add SPI_ALIGNED_TXFIFO config details

[Rajat Srivastava]

From: Ashish Kumar <Ashish.Kumar at nxp.com>

This config makes driver send only 16 bytes aligned data
to TxFIFO while writing on flash.

Signed-off-by: Rajat Srivastava <rajat.srivastava at nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar at nxp.com>
---
 drivers/spi/Kconfig | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index fb794adae7..80621027df 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -33,6 +33,15 @@ config ALTERA_SPI
 	  IP core. Please find details on the "Embedded Peripherals IP
 	  User Guide" of Altera.
 
+config FSL_SPI_ALIGNED_TXFIFO
+       bool "Write only 16 Bytes aligned data on TxFIFO"
+       depends on FSL_QSPI
+       help
+         For some boards, Freescale controller needs driver to fill TxFIFO
+         till 16 bytes to trigger data transfer, in case of flash write.
+         This config enables the Freescale QSPI driver to send 16 bytes
+         aligned data to TxFIFO while performing flash write operation.
+
 config ATCSPI200_SPI
 	bool "Andestech ATCSPI200 SPI driver"
 	help
-- 
2.17.1