[U-Boot] [EXT] Re: [PATCH 1/2] drivers/mtd/spi: Enable 4B opcodes for SPANSION s25fl512s

Rajat Srivastava rajat.srivastava at nxp.com
Fri Apr 26 12:44:19 UTC 2019



> -----Original Message-----
> From: Vignesh Raghavendra <vigneshr at ti.com>
> Sent: Wednesday, April 24, 2019 10:08 PM
> To: Rajat Srivastava <rajat.srivastava at nxp.com>; u-boot at lists.denx.de;
> jagan at openedev.com
> Cc: Ashish Kumar <ashish.kumar at nxp.com>
> Subject: [EXT] Re: [PATCH 1/2] drivers/mtd/spi: Enable 4B opcodes for
> SPANSION s25fl512s
> 
> Caution: EXT Email
> 
> Hi.
> 
> On 24-Apr-19 6:10 PM, Rajat Srivastava wrote:
> > From: Ashish Kumar <Ashish.Kumar at nxp.com>
> >
> > Signed-off-by: Ashish Kumar <Ashish.Kumar at nxp.com>
> > ---
> >  drivers/mtd/spi/spi-nor-ids.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/mtd/spi/spi-nor-ids.c
> > b/drivers/mtd/spi/spi-nor-ids.c index ec929760ee..a89c1910d9 100644
> > --- a/drivers/mtd/spi/spi-nor-ids.c
> > +++ b/drivers/mtd/spi/spi-nor-ids.c
> > @@ -177,7 +177,7 @@ const struct flash_info spi_nor_ids[] = {
> >       { INFO("s25sl064p",  0x010216, 0x4d00,  64 * 1024, 128,
> SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
> >       { INFO("s25fl256s0", 0x010219, 0x4d00, 256 * 1024, 128, USE_CLSR) },
> >       { INFO("s25fl256s1", 0x010219, 0x4d01,  64 * 1024, 512,
> SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
> > -     { INFO6("s25fl512s",  0x010220, 0x4d0081, 256 * 1024, 256,
> SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
> > +     { INFO6("s25fl512s",  0x010220, 0x4d0081, 256 * 1024, 256,
> > + SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR |
> > + SPI_NOR_4B_OPCODES) },
> 
> You should not be needing this change to enable 4 Byte opcodes. From
> spi-nor-core.c:
> 
> 
>         if (nor->addr_width) {
>                 /* already configured from SFDP */
>         } else if (info->addr_width) {
>                 nor->addr_width = info->addr_width;
>         } else if (mtd->size > SZ_16M) { #ifndef CONFIG_SPI_FLASH_BAR
>                 /* enable 4-byte addressing if the device exceeds 16MiB */
>                 nor->addr_width = 4;
>                 if (JEDEC_MFR(info) == SNOR_MFR_SPANSION ||
>                     info->flags & SPI_NOR_4B_OPCODES)
>                         spi_nor_set_4byte_opcodes(nor, info); #else
>         /* Configure the BAR - discover bank cmds and read current bank */
>         nor->addr_width = 3;
>         ret = read_bar(nor, info);
>         if (ret < 0)
>                 return ret;
> #endif
>         }
>         [...]
> 
> 
> So as long as SPI_FLASH_BAR is not set, 4 Byte opcodes are used by default
> with Spansion flashes >16M size. If that's not the case, then we need to root
> cause the actual bug instead of adding SPI_NOR_4B_OPCODES to s25fl512s

You are right. I've tested without using SPI_NOR_4B_OPCODES flag and it is working now. Deprecating this patch now.
 
Regards
Rajat


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