[U-Boot] [PATCH 5/5] rockchip: rk3399: Create single image using BINMAN

[Jagan Teki]

RK3399 platform has two stage boot loaders like SPL and
U-Boot proper. For each stage we need to burn the image
on to flash with respective offsets.

This patch create a single image using binman, so that
user can get rid of burning different stage boot images.

without this patch:
------------------
₹ sudo dd if=spl/u-boot-spl-rockchip.bin of=/dev/sdc seek=64
₹ sudo dd if=u-boot.itb of=/dev/sdc seek=16384

with this patch:
---------------
₹ sudo dd if=u-boot-rockchip-with-spl.bin of=/dev/sdc seek=64

This would easily extend if other rockchip family SoC's would
make use of single image creation.

Signed-off-by: Jagan Teki <jagan at amarulasolutions.com>
---
 Makefile                        | 13 +++++++++++++
 arch/arm/dts/rk3399-u-boot.dtsi | 17 +++++++++++++++++
 arch/arm/mach-rockchip/Kconfig  |  1 +
 doc/README.rockchip             |  8 ++------
 include/configs/rk3399_common.h |  2 ++
 5 files changed, 35 insertions(+), 6 deletions(-)

diff --git a/Makefile b/Makefile
index 92e04dd689..e7f68d63c7 100644
--- a/Makefile
+++ b/Makefile
@@ -851,6 +851,11 @@ ifeq ($(CONFIG_ARCH_SUNXI)$(CONFIG_SPL),yy)
 ALL-y += u-boot-sunxi-with-spl.bin
 endif
 
+# Build a combined spl + u-boot image for rockchip
+ifdef CONFIG_ROCKCHIP_RK3399
+ALL-$(CONFIG_ARCH_ROCKCHIP) += u-boot-rockchip-with-spl.bin
+endif
+
 # enable combined SPL/u-boot/dtb rules for tegra
 ifeq ($(CONFIG_TEGRA)$(CONFIG_SPL),yy)
 ALL-y += u-boot-tegra.bin u-boot-nodtb-tegra.bin
@@ -1366,6 +1371,11 @@ u-boot-sunxi-with-spl.bin: spl/sunxi-spl.bin u-boot.itb FORCE
 endif
 endif
 
+ifeq ($(CONFIG_ROCKCHIP_RK3399),y)
+u-boot-rockchip-with-spl.bin: spl/u-boot-spl-rockchip.bin u-boot.itb FORCE
+	@$(call if_changed,binman)
+endif # CONFIG_ROCKCHIP_RK3399
+
 ifneq ($(CONFIG_TEGRA),)
 ifneq ($(CONFIG_BINMAN),)
 # Makes u-boot-dtb-tegra.bin u-boot-tegra.bin u-boot-nodtb-tegra.bin
@@ -1664,6 +1674,9 @@ spl/u-boot-spl: tools prepare \
 spl/sunxi-spl.bin: spl/u-boot-spl
 	@:
 
+spl/u-boot-spl-rockchip.bin: spl/u-boot-spl
+	@:
+
 spl/sunxi-spl-with-ecc.bin: spl/sunxi-spl.bin
 	@:
 
diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi
index 0786c1193a..abd0b091ab 100644
--- a/arch/arm/dts/rk3399-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-u-boot.dtsi
@@ -3,6 +3,23 @@
  * Copyright (C) 2019 Jagan Teki <jagan at amarulasolutions.com>
  */
 
+#include <config.h>
+
+/ {
+	binman {
+		filename = "u-boot-rockchip-with-spl.bin";
+		pad-byte = <0xff>;
+
+		blob {
+			filename = "spl/u-boot-spl-rockchip.bin";
+		};
+
+		u-boot-img {
+			offset = <CONFIG_SPL_PAD_TO>;
+		};
+	};
+};
+
 &sdmmc {
 	u-boot,dm-pre-reloc;
 };
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 286c870135..7ac0ee3c2d 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -130,6 +130,7 @@ endif
 config ROCKCHIP_RK3399
 	bool "Support Rockchip RK3399"
 	select ARM64
+	select BINMAN
 	select SUPPORT_SPL
 	select SPL
 	select SPL_ATF
diff --git a/doc/README.rockchip b/doc/README.rockchip
index 73594dc61d..791e528262 100644
--- a/doc/README.rockchip
+++ b/doc/README.rockchip
@@ -398,13 +398,9 @@ Option 2: Package the image with SPL:
 
     => cd /path/to/u-boot
 
-  - Write prefixed SPL at 64th sector
+  - Write single spl + u-boot at 64th sector
 
-    => sudo dd if=spl/u-boot-spl-rockchip.bin of=/dev/sdc seek=64
-
-  - Write U-Boot proper at 16384 sector
-
-    => sudo dd if=u-boot.itb of=/dev/sdc seek=16384
+    => sudo dd if=u-boot-rockchip-with-spl.bin of=/dev/sdc seek=64
     => sync
 
 Put this SD (or micro-SD) card into your board and reset it. You should see
diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index b412012582..a658f03ade 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -38,6 +38,8 @@
 #define CONFIG_SYS_SDRAM_BASE		0
 #define SDRAM_MAX_SIZE			0xf8000000
 
+#define CONFIG_SPL_PAD_TO		8355840
+
 #ifndef CONFIG_SPL_BUILD
 
 #define ENV_MEM_LAYOUT_SETTINGS \
-- 
2.18.0.321.gffc6fa0e3