[U-Boot] [PATCH v12 4/9] ARM: socfpga: Moving the watchdog reset to the for-loop status polling
Simon Goldschmidt
simon.k.r.goldschmidt at gmail.com
Sat Apr 27 19:34:54 UTC 2019
On 19.03.19 09:50, tien.fong.chee at intel.com wrote:
> From: Tien Fong Chee <tien.fong.chee at intel.com>
>
> Ensure the watchdog is reset timely on each status polling.
I would have expected a longer commit message here explaining why this
is done, and from where, where to, and why the watchdog reset has been
moved.
Anyway, I don't want to hold back this series again for this, but please
next time: write longer commit messages. Better write too much than risk
someone in the future doesn't get what or why you did things.
Thanks,
Simon
>
> Signed-off-by: Tien Fong Chee <tien.fong.chee at intel.com>
>
> ---
>
> changes for v12
> - Improved the commit messages.
>
> changes for v11
> - No changes.
>
> changes for v10
> - This patch was split out from [PATCH v10 5/9]
> ARM: socfpga: Add FPGA drivers for Arria 10 FPGA.
> ---
> drivers/fpga/socfpga_arria10.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/fpga/socfpga_arria10.c b/drivers/fpga/socfpga_arria10.c
> index b0abe1955c..9499d1a014 100644
> --- a/drivers/fpga/socfpga_arria10.c
> +++ b/drivers/fpga/socfpga_arria10.c
> @@ -360,6 +360,7 @@ static int fpgamgr_program_poll_cd(void)
> printf("nstatus == 0 while waiting for condone\n");
> return -EPERM;
> }
> + WATCHDOG_RESET();
> }
>
> if (i == FPGA_TIMEOUT_CNT)
> @@ -433,7 +434,6 @@ int fpgamgr_program_finish(void)
> printf("FPGA: Poll CD failed with error code %d\n", status);
> return -EPERM;
> }
> - WATCHDOG_RESET();
>
> /* Ensure the FPGA entering user mode */
> status = fpgamgr_program_poll_usermode();
>
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