[U-Boot] [PATCH v2 5/6] arm: mach-omap2: am33xx: ddr: update value for ext_phy_ctrl_36

Keerthy j-keerthy at ti.com
Mon Apr 29 04:29:32 UTC 2019

From: Brad Griffis <bgriffis at ti.com>

for suspend/resume robustness

update value for ext_phy_ctrl_36 for suspend/resume robustness
with hardware leveling enabled.

Match recommended values from EMIF Tools app note:


Signed-off-by: Brad Griffis <bgriffis at ti.com>
Signed-off-by: Keerthy <j-keerthy at ti.com>
 arch/arm/mach-omap2/am33xx/ddr.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-omap2/am33xx/ddr.c b/arch/arm/mach-omap2/am33xx/ddr.c
index c70b6fe31b..3fd1d086ff 100644
--- a/arch/arm/mach-omap2/am33xx/ddr.c
+++ b/arch/arm/mach-omap2/am33xx/ddr.c
@@ -311,8 +311,8 @@ static void ext_phy_settings_hwlvl(const struct emif_regs *regs, int nr)
 	writel(0x00000000, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_34_shdw);
 	writel(0x00000000, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_35);
 	writel(0x00000000, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_35_shdw);
-	writel(0x000000FF, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_36);
-	writel(0x000000FF, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_36_shdw);
+	writel(0x00000077, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_36);
+	writel(0x00000077, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_36_shdw);
 	 * Sequence to ensure that the PHY is again in a known state after

More information about the U-Boot mailing list