[U-Boot] [PATCH] dts: arm: socfpga: fix socfpga_de10_nano console

[Marek Vasut]

On 4/29/19 8:53 PM, Simon Goldschmidt wrote:
> Am 29.04.2019 um 20:33 schrieb Marek Vasut:
>> On 4/29/19 8:32 PM, Simon Goldschmidt wrote:
>>> Booting this board failed as the initial console isn't found since
>>> commit c402e8170245 ("dts: arm: socfpga: merge gen5 devicetrees from
>>> linux")
>>>
>>> The uart0 devicetree entry was missing "clock-frequency = <100000000>:"
>>> since that commit
>>>
>>> Fixes: c402e8170245 ("dts: arm: socfpga: merge gen5 devicetrees from
>>> linux")
>>> Reported-by: rafael mello <rafaelmello_3 at hotmail.com>
>>> Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt at gmail.com>
>>> ---
>>>
>>>   arch/arm/dts/socfpga_cyclone5_de10_nano.dts | 1 +
>>>   1 file changed, 1 insertion(+)
>>>
>>> diff --git a/arch/arm/dts/socfpga_cyclone5_de10_nano.dts
>>> b/arch/arm/dts/socfpga_cyclone5_de10_nano.dts
>>> index b620dd8dda..4be4083941 100644
>>> --- a/arch/arm/dts/socfpga_cyclone5_de10_nano.dts
>>> +++ b/arch/arm/dts/socfpga_cyclone5_de10_nano.dts
>>> @@ -77,6 +77,7 @@
>>>   };
>>>     &uart0 {
>>> +    clock-frequency = <100000000>;
>>>       u-boot,dm-pre-reloc;
>>>   };
>>>  
>> Applied, thanks.
> 
> Wow, that was fast!
> 
>>
>> While at it, can we do something about Gen5 clock driver ?
> 
> Which Gen5 clock driver, haha?
> 
> I might find the time. Would you think the A10 driver would be a good
> point to start?

For a read-only clock driver, based off DT, yes.

-- 
Best regards,
Marek Vasut