[U-Boot] [i.MX8MM+CCF 17/41] ddr: imx8m: fix ddr firmware location when enable SPL OF

[Peng Fan]

With SPL_OF_SPERATE, the device tree will be padded to
end of the u-boot-spl-nodtb.bin, however we also put
the ddr firmware file to this location, so need to adapt
the code with SPL OF and align to 16bytes to ease copy firmware.

Signed-off-by: Peng Fan <peng.fan at nxp.com>
---
 drivers/ddr/imx/imx8m/helper.c | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/drivers/ddr/imx/imx8m/helper.c b/drivers/ddr/imx/imx8m/helper.c
index 61cd4f6db1..1bf580d306 100644
--- a/drivers/ddr/imx/imx8m/helper.c
+++ b/drivers/ddr/imx/imx8m/helper.c
@@ -31,7 +31,17 @@ void ddr_load_train_firmware(enum fw_type type)
 	unsigned long pr_to32, pr_from32;
 	unsigned long fw_offset = type ? IMEM_2D_OFFSET : 0;
 	unsigned long imem_start = (unsigned long)&_end + fw_offset;
-	unsigned long dmem_start = imem_start + IMEM_LEN;
+	unsigned long dmem_start;
+
+#ifdef CONFIG_SPL_OF_CONTROL
+	if (gd->fdt_blob && !fdt_check_header(gd->fdt_blob)) {
+		imem_start = roundup((unsigned long)&_end +
+				     fdt_totalsize(gd->fdt_blob), 16) +
+			fw_offset;
+	}
+#endif
+
+	dmem_start = imem_start + IMEM_LEN;
 
 	pr_from32 = imem_start;
 	pr_to32 = DDR_TRAIN_CODE_BASE_ADDR + 4 * IMEM_OFFSET_ADDR;
-- 
2.16.4