[U-Boot] [PATCH 3/3] common: bouncebuf: handle address in sram for rockchip platform

Christoph Müllner christoph.muellner at theobroma-systems.com
Tue Apr 30 21:33:27 UTC 2019


Hi Kever,

On 4/2/19 10:46 AM, Kever Yang wrote:
> Rockchip SOC's mmc controller does not support read data
> from mmc to sram, we need a bounce buffer(in sdram), and then
> copy to sram.

what exactly is the limitation here?
I mean a DMA engine does not care where it is copying to.

Additionally I was observing recently, that copying from SD card
to SRAM works on RK3399 boards with 4 GB of RAM.
I see a data error in dwmci_data_transfer() only on 2 GB boards.

Therefore my question:
Is this maybe just a problem of the memory area not being mapped in SPL?

Thanks,
Christoph

> 
> Signed-off-by: Kever Yang <kever.yang at rock-chips.com>
> ---
> 
>  common/bouncebuf.c | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/common/bouncebuf.c b/common/bouncebuf.c
> index a7098e2caf..364fb17c96 100644
> --- a/common/bouncebuf.c
> +++ b/common/bouncebuf.c
> @@ -26,6 +26,18 @@ static int addr_aligned(struct bounce_buffer *state)
>  		return 0;
>  	}
>  
> +#ifdef CONFIG_ARCH_ROCKCHIP
> +	/*
> +	 * Rockchip SOC's mmc controller does not support read data
> +	 * from mmc to sram, we need a bounce buffer(in sdram), and then
> +	 * copy to sram.
> +	 */
> +	if (((ulong)state->user_buffer & 0xfff80000) ==
> +	    CONFIG_ROCKCHIP_IRAM_BASE) {
> +		debug("Unsupport IRAM space %p\n", state->user_buffer);
> +		return 0;
> +	}
> +#endif
>  	/* Aligned */
>  	return 1;
>  }
> 


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