[U-Boot] [PATCH RESEND 11/14] i.MX7ULP: Workaround APLL PFD2 to 345.6Mhz

[sbabic at denx.de]

> From: Ye Li <ye.li at nxp.com>
> The GPU uses APLL PFD2 as its clock parent (483.84Mhz) with divider
> set to 1. This frequecy is out of ULP A0 spec. The MAX rate for GPU
> is 350Mhz. So we simply configure the APLL PFD2 to 345.6Mhz (FRAC=28)
> to workaround the problem. The correct fix should let GPU handle the
> clock rate in kernel.
> Signed-off-by: Ye Li <ye.li at nxp.com>
> Signed-off-by: Peng Fan <peng.fan at nxp.com>

Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

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