[U-Boot] [PATCH] ARM: imx: Support larger SPL size on IMX6DQ
Adam Ford
aford173 at gmail.com
Wed Aug 7 13:03:34 UTC 2019
On Wed, Jul 10, 2019 at 10:59 AM Robert Hancock <hancock at sedsystems.ca> wrote:
>
> Previously the SPL size on all iMX6 platforms was restricted to 68KB
> because the OCRAM size on iMX6SL/DL parts is only 128KB. However, the
> other iMX6 variants have 256KB of OCRAM. Add an option
> CONFIG_MX6_OCRAM_256KB which allows using the full size on boards which
> don't need to support the SL/DL variants. This allows for an SPL size of
> 196KB, which makes it much easier to use configurations such as SPL with
> driver model and FDT control.
>
I am not sure if you CC'd Stefano, but you might want to include him
to get his attention. I added him to the list.
> Signed-off-by: Robert Hancock <hancock at sedsystems.ca>
> ---
> arch/arm/mach-imx/mx6/Kconfig | 10 ++++++++++
> common/spl/Kconfig | 3 ++-
> include/configs/imx6_spl.h | 28 ++++++++++++++++++++++++++--
> 3 files changed, 38 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig
> index fe5991e..0613616 100644
> --- a/arch/arm/mach-imx/mx6/Kconfig
> +++ b/arch/arm/mach-imx/mx6/Kconfig
> @@ -87,6 +87,16 @@ config MX6ULL
> select SYSCOUNTER_TIMER
> select SYS_L2CACHE_OFF
>
> +config MX6_OCRAM_256KB
> + bool "Support 256KB OCRAM"
> + depends on MX6D || MX6Q
> + default n
Out of curiosity, if you're going to create a new bool, why not make
the default y if MX6D and MX6Q can both do this? I have another
thought, see below...
> + help
> + Allows using the full 256KB size of the OCRAM on the MX6Q/MX6D series
> + of chips, such as for SPL. The OCRAM of the Lite series of chips is
> + only 128KB, so using this option will prevent the resulting code from
> + working on those chips.
> +
> config MX6_DDRCAL
> bool "Include dynamic DDR calibration routines"
> depends on SPL
> diff --git a/common/spl/Kconfig b/common/spl/Kconfig
> index 142753f..d709781 100644
> --- a/common/spl/Kconfig
> +++ b/common/spl/Kconfig
> @@ -28,7 +28,8 @@ config SPL_FRAMEWORK
> config SPL_SIZE_LIMIT
> int "Maximum size of SPL image"
> depends on SPL
> - default 69632 if ARCH_MX6
> + default 69632 if ARCH_MX6 && !MX6_OCRAM_256KB
> + default 200704 if ARCH_MX6 && MX6_OCRAM_256KB
You could also just check to see if ARCH_MX6 && (MX6Q or MX6Q) instead
of creating a separate bool.
> default 0
> help
> Specifies the maximum length of the U-Boot SPL image.
> diff --git a/include/configs/imx6_spl.h b/include/configs/imx6_spl.h
> index 212dee7..a223930 100644
> --- a/include/configs/imx6_spl.h
> +++ b/include/configs/imx6_spl.h
> @@ -7,10 +7,32 @@
> #define __IMX6_SPL_CONFIG_H
>
> #ifdef CONFIG_SPL
> +
Instead of checking the bool, just check #defined (MX6Q) || defined
(MX6D) or something similar. It seems like having all the resources
available during SPL would be a good thing.
> +#ifdef CONFIG_MX6_OCRAM_256KB
> /*
> - * see Figure 8-3 in IMX6DQ/IMX6SDL Reference manuals:
> + * see Figure 8.4.1 in IMX6DQ Reference manuals:
> + * - IMX6DQ OCRAM (IRAM) is from 0x00907000 to 0x0093FFFF
> + * - BOOT ROM stack is at 0x0093FFB8
> + * - if icache/dcache is enabled (eFuse/strapping controlled) then the
> + * IMX BOOT ROM will setup MMU table at 0x00938000, therefore we need to
> + * fit between 0x00907000 and 0x00938000.
> + * - Additionally the BOOT ROM loads what they consider the firmware image
> + * which consists of a 4K header in front of us that contains the IVT, DCD
> + * and some padding thus 'our' max size is really 0x00908000 - 0x00938000
> + * or 192KB
> + */
> +#define CONFIG_SPL_MAX_SIZE 0x30000
> +#define CONFIG_SPL_STACK 0x0093FFB8
> +/*
> + * Pad SPL to 196KB (4KB header + 192KB max size). This allows to write the
> + * SPL/U-Boot combination generated with u-boot-with-spl.imx directly to a
> + * boot media (given that boot media specific offset is configured properly).
> + */
> +#define CONFIG_SPL_PAD_TO 0x31000
> +#else
> +/*
> + * see Figure 8-3 in IMX6SDL Reference manuals:
> * - IMX6SDL OCRAM (IRAM) is from 0x00907000 to 0x0091FFFF
> - * - IMX6DQ has 2x IRAM of IMX6SDL but we intend to support IMX6SDL as well
> * - BOOT ROM stack is at 0x0091FFB8
> * - if icache/dcache is enabled (eFuse/strapping controlled) then the
> * IMX BOOT ROM will setup MMU table at 0x00918000, therefore we need to
> @@ -29,6 +51,8 @@
> */
> #define CONFIG_SPL_PAD_TO 0x11000
>
> +#endif
> +
> /* MMC support */
> #if defined(CONFIG_SPL_MMC_SUPPORT)
> #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
> --
> 1.8.3.1
>
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