[U-Boot] [PATCH 01/22] tools: imx8m_image: align spl bin image size

[Peng Fan]

Hi Lukasz,

> Subject: Re: [PATCH 01/22] tools: imx8m_image: align spl bin image size
> 
> Hi Peng,
> 
> > Align spl bin image size to 4 byte aligned, because we need to pad ddr
> > firmware in the end of spl bin. However when enable SPL OF, the spl
> > dtb will be padded to u-boot-nodtb.bin, then u-boot-spl.bin size might
> > not be 4 bytes aligned.
> >
> > ddr_load_train_firmware in drivers/ddr/imx/imx8m/helper.c
> 
> I've poked around and there is a U-Boot commit:
> e3963c0943042afcb38d99041a8dc3d55f092f5f
> 
> Which adds:
> "drivers: ddr: introduce DDR driver for i.MX8M"
> 
> Is there any documentation on how to use it (any ./doc/ entry)?
> 
> I guess that this code (from helper.c) helps with setting DDR4 controller
> properly.
> 
> However, patch 22/22 in this series - which adds EVK imx8m board
> - doesn't use this function, but it has hardcoded long table of magic numbers
> to setup DDR controller.
> 
> I guess that those magic numbers are created from running this code?

As we talked on IRC,
There is an external ddr phy firware padded to SPL, which will be loaded
by SPL. Those magic numbers are generated by an DDR TOOL released
by NXP, and SPL will use those arrays to init DDR.

Thanks,
Peng.

> 
> If yes - would it be possible to train/setup the DDR4 controller in SPL as it is
> done on i.MX6Q? Or at least provide a detailed documentation on how to use
> it?
> 
> > use 4 bytes
> > aligned address to load ddr firmware, so we need make sure
> > u-boot-spl.bin is 4 bytes aligned, in this patch we use dd to create a
> > new file named u-boot-spl-pad.bin, then pad ddr firmware.
> >
> > If SPL OF not enabled, this patch not hurt, because `_end` already is
> > 4 bytes aligned.
> >
> > Signed-off-by: Peng Fan <peng.fan at nxp.com>
> > ---
> >  tools/imx8m_image.sh | 5 +++--
> >  1 file changed, 3 insertions(+), 2 deletions(-)
> >
> > diff --git a/tools/imx8m_image.sh b/tools/imx8m_image.sh index
> > ec0881a128..08a6a48180 100755
> > --- a/tools/imx8m_image.sh
> > +++ b/tools/imx8m_image.sh
> > @@ -35,8 +35,9 @@ if [ $post_process = 1 ]; then
> >  		objcopy -I binary -O binary --pad-to 0x8000
> > --gap-fill=0x0 $srctree/lpddr4_pmu_train_2d_imem.bin
> > lpddr4_pmu_train_2d_imem_pad.bin cat
> lpddr4_pmu_train_1d_imem_pad.bin
> > lpddr4_pmu_train_1d_dmem_pad.bin > lpddr4_pmu_train_1d_fw.bin cat
> > lpddr4_pmu_train_2d_imem_pad.bin
> $srctree/lpddr4_pmu_train_2d_dmem.bin
> > > lpddr4_pmu_train_2d_fw.bin
> > -		cat spl/u-boot-spl.bin lpddr4_pmu_train_1d_fw.bin
> > lpddr4_pmu_train_2d_fw.bin > spl/u-boot-spl-ddr.bin
> > -		rm -f lpddr4_pmu_train_1d_fw.bin
> > lpddr4_pmu_train_2d_fw.bin lpddr4_pmu_train_1d_imem_pad.bin
> > lpddr4_pmu_train_1d_dmem_pad.bin
> lpddr4_pmu_train_2d_imem_pad.bin
> > +		dd if=spl/u-boot-spl.bin of=spl/u-boot-spl-pad.bin
> > bs=4 conv=sync
> > +		cat spl/u-boot-spl-pad.bin
> > lpddr4_pmu_train_1d_fw.bin lpddr4_pmu_train_2d_fw.bin >
> > spl/u-boot-spl-ddr.bin
> > +		rm -f lpddr4_pmu_train_1d_fw.bin
> > lpddr4_pmu_train_2d_fw.bin lpddr4_pmu_train_1d_imem_pad.bin
> > lpddr4_pmu_train_1d_dmem_pad.bin
> lpddr4_pmu_train_2d_imem_pad.bin
> > spl/u-boot-spl-pad.bin fi fi
> 
> 
> 
> Best regards,
> 
> Lukasz Majewski
> 
> --
> 
> DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
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