[U-Boot] [EXT] [PATCH 2/6] spi: fsl_qspi: Fix erase issue to adapt spi-mem
Ashish Kumar
ashish.kumar at nxp.com
Wed Aug 14 11:43:01 UTC 2019
> -----Original Message-----
> From: U-Boot <u-boot-bounces at lists.denx.de> On Behalf Of Ye Li
> Sent: Wednesday, August 14, 2019 3:39 PM
> To: jagan at amarulasolutions.com
> Cc: Fabio Estevam <fabio.estevam at nxp.com>; u-boot at lists.denx.de; dl-
> uboot-imx <uboot-imx at nxp.com>
> Subject: [EXT] [U-Boot] [PATCH 2/6] spi: fsl_qspi: Fix erase issue to adapt spi-
> mem
>
> Caution: EXT Email
>
> After switched to spi-mem, the data format passed by xfer is changed for
> erase. The address of erase is moved to data phase in SPI_XFER_END.
> Update the driver to fix the erase issue
This does not seems true. Which u-boot version are you referring?
With new SPI-MEM frame work, sequence ID is now of 4-byte addressing is size is >16MB, a fsl_qspi.c patch was posted upstream but it was asked to move to spi-mem.
http://patchwork.ozlabs.org/patch/1091524/
>
> Signed-off-by: Ye Li <ye.li at nxp.com>
> ---
> drivers/spi/fsl_qspi.c | 17 +++++++++++++----
> 1 file changed, 13 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/spi/fsl_qspi.c b/drivers/spi/fsl_qspi.c index
> 8845986..13cf0e9 100644
> --- a/drivers/spi/fsl_qspi.c
> +++ b/drivers/spi/fsl_qspi.c
> @@ -785,6 +785,19 @@ int qspi_xfer(struct fsl_qspi_priv *priv, unsigned int
> bitlen,
> }
>
> if (flags == SPI_XFER_END) {
> + if ((priv->cur_seqid == QSPI_CMD_SE) ||
> + (priv->cur_seqid == QSPI_CMD_BE_4K)) {
> + int i;
> + txbuf = *(u8 *)dout;
> + for (i = 1; i < bytes; i++) {
> + txbuf <<= 8;
> + txbuf |= *(((u8 *)dout) + i);
> + }
> +
> + priv->sf_addr = txbuf;
> + qspi_op_erase(priv);
> + return 0;
> + }
> priv->sf_addr = wr_sfaddr;
> qspi_op_write(priv, (u8 *)dout, bytes);
> return 0;
> @@ -793,10 +806,6 @@ int qspi_xfer(struct fsl_qspi_priv *priv, unsigned int
> bitlen,
> if (priv->cur_seqid == QSPI_CMD_FAST_READ ||
> priv->cur_seqid == QSPI_CMD_RDAR) {
> priv->sf_addr = swab32(txbuf) & OFFSET_BITS_MASK;
> - } else if ((priv->cur_seqid == QSPI_CMD_SE) ||
> - (priv->cur_seqid == QSPI_CMD_BE_4K)) {
> - priv->sf_addr = swab32(txbuf) & OFFSET_BITS_MASK;
> - qspi_op_erase(priv);
I update this on internal repo and it works:
driver/spi/fsl_qspi : update op_erase wrt 24/32 bits address
Signed-off-by: Ashish Kumar <Ashish.Kumar at nxp.com>
diff --git a/drivers/spi/fsl_qspi.c b/drivers/spi/fsl_qspi.c
index 300d020486..7aaab8301e 100644
--- a/drivers/spi/fsl_qspi.c
+++ b/drivers/spi/fsl_qspi.c
@@ -818,8 +818,10 @@ int qspi_xfer(struct fsl_qspi_priv *priv, unsigned int bitlen,
} else if (priv->cur_seqid == QSPI_CMD_FAST_READ_4B) {
priv->sf_addr = swab32(txbuf) & OFFSET_BITS_MASK;
} else if ((priv->cur_seqid == QSPI_CMD_SE) ||
- priv->cur_seqid == QSPI_CMD_SE_4B ||
priv->cur_seqid == QSPI_CMD_BE_4K) {
+ priv->sf_addr = swab32(txbuf) & OFFSET_BITS_MASK24;
+ qspi_op_erase(priv);
+ } else if (priv->cur_seqid == QSPI_CMD_SE_4B) {
priv->sf_addr = swab32(txbuf) & OFFSET_BITS_MASK;
qspi_op_erase(priv);
} else if (priv->cur_seqid == QSPI_CMD_PP ||
> } else if (priv->cur_seqid == QSPI_CMD_PP ||
> priv->cur_seqid == QSPI_CMD_WRAR) {
> wr_sfaddr = swab32(txbuf) & OFFSET_BITS_MASK;
> --
> 2.7.4
>
> _______________________________________________
> U-Boot mailing list
> U-Boot at lists.denx.de
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.d
> enx.de%2Flistinfo%2Fu-
> boot&data=02%7C01%7CAshish.Kumar%40nxp.com%7C360e07152fea4
> 278ec9008d7209fbc7a%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%
> 7C637013742744957457&sdata=FRanhGdnBuIBIF433L8PQeqTvFDrktwv
> %2BQjKPROFwMw%3D&reserved=0
More information about the U-Boot
mailing list